Arm System Architecture: Furber, Stephen B.; Furber, Steve: 9780201403527: Book: Computers: eCampus.com

ARM System Architecture will allow you to get started with ARM and get programs running under emulation. A competent user should understand how ARMs work and be able to conduct simple experiments in architecture modeling with only a book as a reference.

Preface

1 An Introduction to Processor Design

(36)

1.1 Processor architecture and organization

(2)

1.2 Abstraction in hardware design

(2)

1.3 MUO -- a simple processor

(7)

1.4 Instruction set design

(6)

1.5 Precessor design trade-offs

(5)

1.6 The Reduced Instruction Set Computer

(4)

1.7 Design for low power consumption

(4)

1.8 Examples and exercises

(3)

2 The ARM Architecture

(14)

2.1 The Acorn RISC Machine

(1)

2.2 Architectural inheritance

(2)

2.3 The ARM programmer's model

(5)

2.4 ARM development tools

(4)

2.5 Example and exercises

(1)

3 ARM Assembly Language Programming

(26)

3.1 Data processing instructions

(6)

3.2 Data tansfer instructions

(8)

3.3 Control flow instructions

(6)

3.4 Writing simple assembly language programs

(3)

3.5 Examples and exercises

(2)

4 ARM Organization and Implemention

(32)

4.1 ARM organization

(4)

4.2 ARM instrucion execution

(4)

4.3 ARM implemention

(15)

4.4 The ARM coprocessor interface

101

(2)

4.5 Design tools

103

(4)

4.6 Examples and exercises

107

(2)

5 The ARM Instruction Set

109

(50)

5.1 Introduction

110

(3)

5.2 Exceptions

113

(4)

5.3 Conditional execution

117

(2)

5.4 Branch and Branch with Link (B, BL)

119

(2)

5.5 Branch and eXchange instructions (BX)

121

(1)

5.6 Software Interrupt (SWI)

122

(2)

5.7 Data processing instructions

124

(4)

5.8 Multiply instructions

128

(2)

5.9 Single word and unsigned byte data transfer in instructions

130

(3)

5.10 Half-word and signed byte data transfer instructions

133

(2)

5.11 Multiple register transfer instructions

135

(2)

5.12 Swap memory and register instructions (SWP)

137

(1)

5.13 Status register to general register transfer instrucions

138

(1)

5.14 General register to status register transfer instrucions

139

(2)

5.15 Coprocessor instructions

141

(1)

5.16 Coprocessor data orperations

142

(1)

5.17 Corprocessor data transfers

143

(2)

5.18 Coprocessor register transfers

145

(2)

5.19 Unused instruction space

147

(2)

5.20 Memory faults

149

(4)

5.21 ARM architecture variants

153

(4)

5.22 Example and exercises

157

(2)

6 Architectural Support for High-Level Languages

159

(40)

6.1 Abstraction in software design

160

(1)

6.2 Data types

161

(6)

6.3 Floating-point data types

167

(5)

6.4 The ARM floating-point architecture

172

(6)

6.5 Expressions

178

(2)

6.6 Conditional statements

180

(3)

6.7 Loops

183

(2)

6.8 Functions and procedures

185

(6)

6.9 Use of memory

191

(5)

6.10 Run-time environment

196

(1)

6.11 Examples and exercises

197

(2)

7 The Thumb Instruction Set

199

(20)

7.1 The Thumb bit in the CPSR

200

(1)

7.2 The Thumb programmer's model

201

(2)

7.3 Thumb branch instructions

203

(2)

7.4 Thumb software interrupt instruction

205

(1)

7.5 Thumb data processing instructions

206

(3)

7.6 Thumb single register data transfer instructions

209

(2)

7.7 Thumb multiple register data transfer instructions

211

(2)

7.8 Thumb implementation

213

(2)

7.9 Thumb applications

215

(1)

7.10 Example and exercises

216

(3)

8 Architectural Support for System Development

219

(24)

8.1 The ARMulator

220

(1)

8.2 The JTAG boundary scan test architecture

221

(7)

8.3 The ARM debug architecture

228

(5)

8.4 The Partner-ET ROM-ICE

233

(1)

8.5 The Advanced Microcontroller Bus Architecture (AMBA)

234

(5)

8.6 The ARM reference microcontroller

239

(2)

8.7 Example and exercises

241

(2)

9 ARM Processor Cores

243

(28)

9.1 ARM6

244

(5)

9.2 ARM7TDMI

249

(5)

9.3 ARM8

254

(5)

9.4 AMULET1 & 2

259

(10)

9.5 Examples and exercises

269

(2)

10 Memory Hierarchy

271

(16)

10.1 Memory size and speed

272

(1)

10.2 Caches

273

(8)

10.3 Memory management

281

(5)

10.4 Examples and exercises

286

(1)

11 Architectural Support for Operating Systems

287

(22)

11.1 An introduction to operating systems

288

(3)

11.2 The ARM system control coprocessor

291

(3)

11.3 ARM MMU architecture

294

(7)

11.4 Synchronization

301

(1)

11.5 Context switching

302

(2)

11.6 Input/Output

304

(4)

11.7 Example and exercises

308

(1)

12 ARM Processor Chips

309

(30)

12.1 The ARM600 and ARM610

310

(11)

12.2 The ARM700 and ARM710

321

(5)

12.3 The ARM810

326

(3)

12.4 The StrongARM

329

(9)

12.5 Example and exercises

338

(1)

13 ARM Systems

339

(30)

13.1 The ARM memory interface

340

(10)

13.2 The Platform Independent Evaluation card

350

(5)

13.3 The Acorn Archimedes

355

(2)

13.4 The Acorn Risc PC

357

(5)

13.5 The Apple Newton

362

(4)

13.6 Examples and exercises

366

(3)

14 Embedded ARM Processor Cores

369

(20)

14.1 GEC Plessey Semiconductors Butterfly microcontroller

370

(3)

14.2 Tha VLSI Ruby II Advanced Communication Processor

373

(2)

14.3 The VLSI ISDN Subscriber Processor

375

(3)

14.4 The ARM7500

378

(4)

14.5 AMULET2e

382

(4)

14.6 Examples and exercises

386

(6)

Appendix: Computer Logic

389

(8)

Glossary

397

(8)

Bibliography

405

(4)

Index

409


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