9780471603450

Digital Logic Design : Tutorial and Laboratory Exercises

by ;
  • ISBN13:

    9780471603450

  • ISBN10:

    0471603457

  • Format: Paperback
  • Copyright: 1984-10-01
  • Publisher: Wiley

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Supplemental Materials

What is included with this book?

  • The New copy of this book will include any supplemental materials advertised. Please check the title of the book to determine if it should include any access cards, study guides, lab manuals, CDs, etc.
  • The Used and Rental copies of this book are not guaranteed to include any supplemental materials. Typically, only the book itself is included. This is true even if the title states it includes any access cards, study guides, lab manuals, CDs, etc.

Summary

The perfect complement to computer architecture and logic texts. This widely praised tutorial and lab book gives practice in the fundamentals of digital logic and circuitry, with special emphasis on how the machine operates at the gate and register level. Presentation employs the TTL family of digital logic due to its wide availability and moderate cost. Exercises require the student to perform a simple designs and then implement them on hardware. Contains sufficient exercises for a 3-hour lab meeting, once a week, for a semester.

Table of Contents

Preface ix
Review of Fundamental Concepts and an Introduction to the TTL Family
1(8)
Fundamental Digital Concepts
1(3)
Introduction to the TTL Family
4(1)
Wiring and Testing a Circuit
5(4)
Lab Exercise
6(1)
Review Questions
6(3)
Basic Two-Level Circuits
9(8)
Sum of Products Form
9(3)
Product of Sums Form
12(2)
Design Considerations
14(3)
Lab Exercise
14(1)
Review Questions
15(2)
Implementation with One Gate Type
17(9)
Motivation
17(1)
Algebraic Manipulation
18(1)
Gate Equivalencies
19(2)
Logic Diagram Design Using Gate Equivalencies
21(5)
Lab Exercise
24(1)
Review Questions
24(2)
Expression Reduction Techniques
26(9)
Expression Reduction
26(1)
Algebraic Reduction
26(1)
Karnaugh Maps
27(8)
Lab Exercise
32(1)
Review Questions
32(3)
Multiplexors and Demultiplexors
35(10)
Multiplexors and Demultiplexors Defined
35(1)
The Multiplexor
35(2)
The Demultiplexor
37(1)
Multiplexor-Demultiplexor Applications
38(7)
Lab Exercise
43(1)
Review Questions
43(2)
Binary Adders and Other Combinational Networks
45(9)
Binary Adders
45(2)
Carry Lookahead
47(2)
Other Important Combinational Networks
49(5)
Lab Exercise
51(1)
Review Questions
52(2)
Latches and Flip-Flops
54(8)
Sequential Circuits
54(1)
The S-R Latch
54(2)
Synchronous Latches (Flip-Flops)
56(3)
TTL Flip-Flops
59(3)
Lab Exercise
60(1)
Review Questions
61(1)
Counters
62(8)
Counters Defined
62(1)
Asynchronous Ripple Counters
62(2)
Generating Clock Signals with Ripple Counters
64(3)
Other Applications of Counters
67(1)
Commercially Available Ripple Counters
68(2)
Lab Exercise
68(1)
Review Questions
69(1)
State Sequencers and Controllers
70(9)
State Sequencers and Controllers Defined
70(1)
Synchronous Counters
71(2)
State Sequencers
73(6)
Lab Exercise
77(1)
Review Questions
77(2)
Registers
79(9)
Registers Defined
79(1)
Register Design
79(3)
Register Interfacing
82(3)
Commercially Available Registers
85(3)
Lab Exercise
86(1)
Review Questions
86(2)
appendix A Boolean Algebra 88(2)
Boolean Laws
89(1)
Postulates of Boolean Algebra
89(1)
appendix B TTL Parts and Layouts 90(17)
appendix C References 107(1)
appendix D Recommended Parts List and Lab Equipment 108(3)
Index 111

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