Advances In Computer Systems Architecture: 9th Asia-pacific Conference, Acsac 2004, Beijing, China, September 7-9, 2004, Proceedings

by Yew, Pen-Chung; Xue, Jingling

• ISBN13: 9783540230038
• ISBN10: 3540230033
• Format: Paperback
• Copyright: 2005-01-30
• Publisher: Springer Verlag

Summary

This book constitutes the refereed proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference, ACSAC 2004, held in Beijing, China in September 2004. The 45 revised full papers presented were carefully reviewed and selected from 154 submissions. The papers are organized in topical sections on cache and memory, reconfigurable and embedded architectures, processor architecture and design, power and energy management, compiler and operating systems issues, application-specific systems, interconnection networks, prediction techniques, parallel architectures and programming, microarchitecture design and evaluation, memory and I/O systems, and others.

Table of Contents

Keynote Address I Some Real Observations on Virtual Machines	1	(269)
James E. Smith
Session 1A: Cache and Memory
Replica Victim Caching to Improve Reliability of In-Cache Replication	2	(14)
Wei Zhang
Efficient Victim Mechanism on Sector Cache Organization	16	(14)
Chunrong Lai, Shih-Lien Lu
Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy	30	(14)
Xingyan Tian, Kejia Zhao, Huowang Chen, Hongyan Du
Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures	44	(14)
Diego Andrade, Basilio B. Fraguela, Ramón Doallo
Session 1B: Reconfigurable and Embedded Architectures
A Configurable System-on-Chip Architecture for Embedded Devices	58	(14)
Sebastian Wallner
An Auto-adaptative Reconfigurable Architecture for the Control	72	(16)
Nicolas Ventroux, Stéphane Chevobbe, Fréderic Blanc, Thierry Collette
Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory	88	(14)
Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System	102	(13)
Seong- Yong Ahn, Jun- Yong Kim, Jeong-A Lee
Session 2A: Processor Architecture and Design I
Architecture Design of a High-Performance 32-Bit Fixed-Point DSP	115	(11)
Jian Chen, Ruhao Xu, Yuzhuo Fu
TengYue-1: A High Performance Embedded SoC	126	(11)
Lei Wang, Hong-yi Lu, Kui Dai, Zhi-ying Wang
A Fault-Tolerant Single-Chip Multiprocessor	137	(9)
Wenbin Yao, Dongsheng Wang, Weimin Zheng
Session 2B: Power and Energy Management
Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy	146	(14)
Philip Machanick
dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization	160	(10)
Kui-Yon Mun, Dae-Woong Kim, Do-Hun Kim, Chan-Ik Park
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption	170	(15)
Byung-Soo Choi, Jeong-A Lee, Dong-Soo Har
Session 3A: Processor Architecture and Design II
Dynamic Reallocation of Functional Units in Superscalar Processors	185	(14)
Marc Epalza, Paolo lenne, Daniel Mlynek
Multiple-Dimension Scalable Adaptive Stream Architecture	199	(13)
Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang
Impact of Register-Cache Bandwidth Variation on Processor Performance	212	(14)
Kentaro Hamayasu, Vasily G. Moshnyaga
Session 3B: Compiler and Operating System Issues
Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling	226	(15)
Youfeng Wu, Yong-Fong Lee
Continuous Adaptive Object-Code Re-optimization Framework	241	(15)
Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew
Initial Evaluation of a User-Level Device Driver Framework	256	(15)
Kevin Elphinstone, Stefan Götz
Keynote Address II A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To?	270	(103)
Jesse Z. Fang
Session 4A: Application-Specific Systems
A Cost-Effective Supersampling for Full Scene AntiAliasing	271	(11)
Byung-Uck Kim, Woo-Chan Park, Sung-Bong Yang, Tack-Don Han
A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2m)	282	(14)
Stefan Tillich, Johann Großschädl
Scalable Design Framework for JPEG2000 System Architecture	296	(13)
Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
Real-Time Three Dimensional Vision	309	(12)
JongSu Yi, JunSeong Kim, LiPing Li, John Morris, Gareth Lee, Philippe Leclercq
Session 4B: Interconnection Networks
A Router Architecture for QoS Capable Clusters	321	(14)
Madhusudhanan Anantha, Bose Bella
Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability	335	(14)
Zhenghao Zhang, Yuanyuan Yang
Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube	349	(14)
Hashem Hashemi Najaf-abadi, Hamid Sarbazi-Azad
A Two-Level On-Chip Bus System Based on Multiplexers	363	(11)
Kyoung-Sun Jhang, Kang Yi, Soo Yun Hwang
Keynote Address III Make Computers Cheaper and Simpler	373	(224)
GuoJie Li
Session 5A: Prediction Techniques
A Low Power Branch Predictor to Selectively Access the BTB	374	(11)
Sung Woo Chung, Sung Bae Park
Static Techniques to Improve Power Efficiency of Branch Predictors	385	(14)
Weidong Shi, Tao Zhang, Santosh Pande
Choice Predictor for Free	399	(15)
Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee
Performance Impact of Different Data Value Predictors	414	(12)
Yong Xiao, Kun Deng, Xingming Zhou
Session 5B: Parallel Architecture and Programming
Heterogeneous Networks of Workstations	426	(14)
SunHo Baek, KyuHo Lee, JunSeong Kim, John Morris
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays	440	(9)
Jigang Wu, Thambipillai Srikanthan
Order Independent Transparency for Image Composition Parallel Rendering Machines	449	(12)
Woo-Chan Park, Tack-Don Han, Sung-Bong Yang
An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments	461	(12)
Changqin Huang, Guanghua Song, Yao Zhang, Deren Chen
Session 6A: Microarchitecture Design and Evaluations
Validating Word-Oriented Processors for Bit and Multi-word Operations	473	(16)
Ruby B. Lee, Xiao Yang, Zhijie Jerry Shi
Dynamic Fetch Engine for Simultaneous Multithreaded Processors	489	(14)
Tzung-Rei Yang, Jong-Jiann Shieh
A Novel Rename Register Architecture and Performance Analysis	503	(12)
Zhenyu Liu, Jiayue Qi
Session 6B: Memory and I/O Systems
A New Hierarchy Cache Scheme Using RAM and Pagefile	515	(12)
Rui-fang Liu, Change-sheng Xie, Zhi-hu Tan, Qing Yang
An Object-Oriented Data Storage System on Network-Attached Object Devices	527	(12)
Youhui Zhang, Weimin Zheng
A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory	539	(15)
Kiyofumi Tanaka, Toshihide Hagiwara
Session 7A: Potpourri
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking	554	(14)
Xiaobin Li, Jean-Luc Gaudiot
A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel	568	(14)
Woo-Chan Park, Tack-Don Han, Sung-Bong Yang
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization	582	(15)
Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek
Author Index	597