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9781584503743

Digital Design From Gates to Intelligent Machines

by ;
  • ISBN13:

    9781584503743

  • ISBN10:

    1584503742

  • Edition: 1st
  • Format: Hardcover
  • Copyright: 2005-11-15
  • Publisher: Charles River Media
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Summary

This book is a comprehensive introduction to the science and art of designing digital circuits. It begins by describing two foundational topics, numbers systems and boolean algebra. These topics then form the basis for the introduction of simple combinational circuits, or circuits without a memory. Complex circuits of this form are then described. It is shown, for example, how to construct a carry-look-ahead adder from elementary logic gates. Sequential digital circuits, or circuits with memories, are then treated, with the emphasis on sequential design. These topics then allow the introduction of a simple but operational digital computer that includes an arithmetic logic unit (ALU). The book concludes by showing that many of the principles developed in earlier chapters can be applied to the construction of intelligent machines.

Author Biography

Bruce Katz is currently a professor in the Department of Electrical and Computer Engineering at Drexel University.

Table of Contents

Preface xvii
Numbers and Number Systems
1(24)
Introduction
1(3)
Numbers
4(1)
Positional Number Systems and Bases
5(6)
Conversions Between Bases
8(1)
Conversions to and from Other Bases to Base 10
9(2)
Binary Number Systems
11(7)
Binary Addition and Subtraction
12(3)
Binary Multiplication
15(1)
Negative Numbers in Binary: Signed Magnitude and Two's Complement
15(3)
Codes
18(4)
BCD
18(1)
Gray Coding
19(1)
Parity
20(1)
ASCII and Unicode
20(2)
Summary
22(1)
Exercises
22(3)
LATTICE Exercises
23(2)
Boolean Algebra
25(30)
Introduction
25(1)
Logical Functions in Boolean Algebra
26(8)
Truth Tables
29(2)
Tautology, Equivalence, and Logical Laws
31(2)
Other Useful Logical Operators
33(1)
Simplification
34(16)
Simplification with Logical Laws
35(2)
Minterms and Maxterms
37(5)
Karnaugh Maps and Minimization
42(8)
Summary
50(1)
Exercises
51(4)
LATTICE Exercises
53(2)
Elementary Combinational Circuits
55(26)
Introduction
55(1)
Logic, Gates, and Circuits
56(11)
Elementary Gates
56(3)
Circuits to Functions and Truth Tables
59(2)
Realizing a Function Directly
61(2)
Realizing a Circuit Through Minterms and Maxterms
63(1)
Alternative Representations of SOP and POS Functions
64(2)
Realizing a Minimized Form of a Function
66(1)
Gates and Integrated Circuits in Practice
67(11)
Logic Technologies and Logic Families
68(1)
Values and Voltages
69(1)
Fan-In and Fan-Out
70(2)
Gate Delays and Circuit Delays
72(2)
Implementation of Gates
74(4)
Summary
78(1)
Exercises
78(3)
LATTICE Exercises
80(1)
Complex Combinational Circuits
81(36)
Introduction
81(1)
Binary Adders
82(8)
Full Adder
82(3)
Ripple-Carry Adder
85(1)
Carry-Look-Ahead Adder
86(2)
Two's Complement Addition and Subtraction
88(2)
Decoders and Encoders
90(10)
Binary Decoders
91(4)
Decoder Applications
95(2)
Encoders
97(3)
Multiplexers and Demultiplexers
100(7)
Programmable Logic Devices (PLDs)
107(5)
Programmable Read Only Memory (PROM)
107(1)
Programmable Array Logic (PALreg;)
108(1)
Programmable Logic Array (PLA)
109(3)
Summary
112(2)
Exercises
114(3)
LATTICE Exercises
116(1)
Elements of Sequential Design
117(22)
Introduction
117(2)
Latches
119(6)
SR Latch
119(4)
D Latch
123(2)
Flip-Flops
125(5)
Edge-Triggered D Flip-Flop
125(2)
Edge-Triggered J-K Flip-Flop
127(3)
Registers
130(4)
Parallel-Load Registers
130(2)
Shift Registers
132(2)
Summary
134(1)
Exercises
134(5)
LATTICE Exercises
137(2)
Sequential Machines
139(40)
Introduction
139(1)
Finite State Machines
140(4)
Mealy and Moore Machines
144(1)
Sequential Machine Analysis
145(5)
Sequential Machine Synthesis
150(20)
General Method
150(3)
The Parity Example
153(4)
A Sequence Recognition Example
157(5)
A Maze Example
162(8)
Designing with J-K Flip-Flops
170(4)
Summary
174(1)
Exercises
175(4)
LATTICE Exercises
177(2)
Elements of Computer Design
179(18)
Introduction
179(3)
Computer Organization
182(1)
Memory
183(6)
The CPU
189(2)
I/O
191(2)
Summary
193(1)
Exercises
194(3)
LATTICE Exercises
195(2)
The Design of a Simple CPU and Computer
197(32)
Introduction
197(1)
The Register Set
198(3)
The Instruction Set
201(3)
The Control Unit
204(10)
The Fetch-Decode-Execute Cycle
205(2)
The Control Unit Finite State Machine
207(3)
Data Paths
210(4)
The ALU
214(4)
Putting It All Together
218(5)
Further Issues in Computer Design
223(3)
Microsequencing
224(1)
Interrupts
224(1)
RISC and Pipelining
225(1)
High-Level Languages
226(1)
Summary
226(1)
Exercises
227(2)
LATTICE Exercises
228(1)
Explorations in Digital Intellligence
229(34)
Introduction
229(3)
Pattern Recognition
232(3)
Pattern Completion
235(1)
Interference and Expert Systems
236(4)
Neural Networks
240(9)
Learning
249(5)
Search
254(2)
Emergent Behavior
256(3)
Summary
259(4)
LATTICE Exercises
260(3)
Appendix The LATTICE System
263(16)
Introduction
263(1)
Installation
264(3)
System Requirements
264(1)
Installation Procedure
264(1)
General Operation
265(1)
Program Layout
265(1)
File Menu Options
265(1)
Animation Options
266(1)
Mouse Buttons
266(1)
Truth Systems
267(3)
Variable Drop-Down Box
267(1)
Operator Drop-Down Box
268(1)
Truth Table Options (Bottom of Screen)
269(1)
Variable Settings Dialog Box
269(1)
State Systems
270(5)
Column 1 (State Color)
271(1)
Column 2 (State Action)
271(2)
Column 3 (State Name)
273(1)
Columns 4 Through the End of the Table (State Transitions)
273(1)
State Variable Settings
273(2)
State Table Options (Bottom of Screen)
275(1)
Tricks of the Trade
275(2)
System Submission
277(2)
Index 279

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