High-Speed Digital System Design A Handbook of Interconnect Theory and Design Practices

by Hall, Stephen H.; Hall, Garrett W.; McCall, James A.

• ISBN13: 9780471360902
• ISBN10: 0471360902
• Edition: 1st
• Format: Hardcover
• Copyright: 2000-09-08
• Publisher: Wiley-IEEE Press

Summary

* The practical aspects of making measurements in high-speed digital systems

Author Biography

STEPHEN H. HALL is a Senior Design Engineer at Intel Corporation, Portland, Oregon. <BR>

Table of Contents

Preface	xi
The Importance of Interconnect Design	1	(6)
The Basics	2	(2)
The Past and the Future	4	(3)
Ideal Transformation Line Fundamentals	7	(35)
Transmission Line Structures on a PCB or MCM	7	(1)
Wave Propagation	8	(1)
Transmission Line Parameters	9	(9)
Characteristic Impedance	11	(3)
Propagation Velocity, Time, and Distance	14	(1)
Equivalent Circuit Models for SPICE Simulation	15	(3)
Launching Initial Wave and Transmission Line Reflections	18	(18)
Initial Wave	18	(1)
Multiple Reflections	19	(7)
Effect of Rise Time on Reflections	26	(2)
Reflections From Reactive Loads	28	(4)
Termination Schemes to Eliminate Reflections	32	(4)
Additional Examples	36	(6)
Problem	36	(1)
Goals	36	(1)
Calculating the Cross-Sectional Geometry of the PCB	37	(1)
Calculating the Propagation Delay	38	(1)
Determining the Wave Shape Seen at the Receiver	39	(1)
Creating an Equivalent Circuit	40	(2)
Crosstalk	42	(32)
Mutual Inductance and Mutual Capacitance	42	(1)
Inductance and Capacitance Matrix	43	(2)
Field Simulators	45	(1)
Crosstalk-Induced Noise	45	(6)
Simulating Crosstalk Using Equivalent Circuit Models	51	(1)
Crosstalk-Induced Flight Time and Signal Integrity Variations	52	(10)
Effect of Switching Patterns on Transmission Line Performance	53	(6)
Simulating Traces in a Multiconductor System Using a Single-Line Equivalent Model	59	(3)
Crosstalk Trends	62	(3)
Termination of Odd- and Even-Mode Transmission Line Pairs	65	(2)
Pi Termination Network	65	(1)
T Termination Network	66	(1)
Minimization of Crosstalk	67	(1)
Additional Examples	68	(6)
Problem	69	(1)
Goals	70	(1)
Determining the Maximum Crosstalk-Induced Impedance and Velocity Swing	70	(2)
Determining if Crosstalk Will Induce False Triggers	72	(2)
Nonideal Interconnect Issues	74	(28)
Transmission Line Losses	74	(17)
Conductor DC Losses	75	(1)
Dielectric DC Losses	75	(1)
Skin Effect	76	(11)
Frequency-Dependent Dielectric Losses	87	(4)
Variations in the Dielectric Constant	91	(1)
Serpentine Traces	92	(3)
Intersymbol Interference	95	(2)
Effects of 90° Bends	97	(2)
Effect of Topology	99	(3)
Connectors, Packages, and Vias	102	(27)
Vias	102	(2)
Connectors	104	(8)
Series Inductance	104	(1)
Shunt Capacitance	105	(1)
Connector Crosstalk	105	(1)
Effects of Inductively Coupled Connector Pin Fields	106	(3)
EMI	109	(1)
Connector Design Guidelines	110	(2)
Chip Packages	112	(17)
Common Types of Packages	113	(4)
Creating a Package Model	117	(4)
Effects of a Package	121	(6)
Optimal Pin-Outs	127	(2)
Nonideal Return Paths, Simultaneous Switching, Noise, and Power Delivery	129	(27)
Nonideal Current Return Paths	129	(12)
Path of Least Inductance	129	(1)
Signals Traversing a Ground Gap	130	(4)
Signals That Change Reference Planes	134	(1)
Signals Referenced to a Power or a Ground Plane	135	(5)
Other Nonideal Return Path Scenarios	140	(1)
Differential Signals	140	(1)
Local Power Delivery Networks	141	(10)
Determining the Local Decoupling Requirements for High-Speed I/O	144	(3)
System-Level Power Delivery	147	(2)
Choosing a Decoupling Capacitor	149	(1)
Frequency Response of a Power Delivery System	150	(1)
SSO/SSN	151	(5)
Minimizing SSN	154	(2)
Buffer Modeling	156	(22)
Types of Models	157	(1)
Basic CMOS Output Buffer	157	(18)
Basic Operation	157	(7)
Linear Modeling of the CMOS Buffer	164	(8)
Behavioral Modeling of the Basic CMOS Buffer	172	(3)
Output Buffers That Operate in the Saturation Region	175	(2)
Conclusions	177	(1)
Digital Timing Analysis	178	(16)
Common-Clock Timing	178	(5)
Common-Clock Timing Equations	180	(3)
Source Synchronous Timing	183	(9)
Source Synchronous Timing Equations	186	(3)
Deriving Source Synchronous Timing Equations from an Eye Diagram	189	(2)
Alternative Source Synchronous Schemes	191	(1)
Alternative Bus Signaling Techniques	192	(2)
Incident Clocking	192	(1)
Embedded Clock	192	(2)
Design Methodologies	194	(38)
Timings	195	(5)
Worst-Cast Timing Spreadsheet	196	(2)
Statistical Spreadsheets	198	(2)
Timing Metrics, Signal Quality Metrics, and Test Loads	200	(10)
Voltage Reference Uncertainty	200	(2)
Simulation Reference Loads	202	(4)
Flight Time	206	(1)
Flight-Time Skew	207	(2)
Signal Integrity	209	(1)
Design Optimization	210	(5)
Paper Analysis	211	(1)
Routing Study	212	(3)
Sensitivity Analysis	215	(14)
Initial Trend and Significance Analysis	215	(6)
Ordered Parameter Sweeps	221	(3)
Phase 1 Solution Space	224	(1)
Phase 2 Solution Space	225	(3)
Phase 3 Solution Space	228	(1)
Design Guidelines	229	(1)
Extraction	230	(1)
General Rules of Thumb to Follow When Designing a System	230	(2)
Radiated Emissions Compliance and System Noise Minimization	232	(44)
FCC Radiated Emission Specifications	233	(1)
Physical Mechanisms of Radiation	233	(13)
Differential-Mode Radiation	234	(7)
Common-Mode Radiation	241	(4)
Wave Impedance	245	(1)
Decoupling and Choking	246	(17)
High-Frequency Decoupling at the System Level	248	(5)
Chocking Cables and Localized Power and Ground Planes	253	(8)
Low-Frequency Decoupling and Ground Isolation	261	(2)
Additional PCB Design Criteria, Package Considerations, and Pin-Outs	263	(2)
Placement of High-Speed Components and Traces	263	(1)
Crosstalk	263	(1)
Pin Assignments and Package Choice	264	(1)
Enclosure (Chassis) Considerations	265	(8)
Shielding Basics	265	(2)
Apertures	267	(5)
Resonances	272	(1)
Spread Spectrum Clocking	273	(3)
High-Speed Measurement Techniques	276	(42)
Digital Oscilloscopes	276	(7)
Bandwidth	277	(1)
Sampling	278	(3)
Other Effects	281	(2)
Statistics	283	(1)
Time-Domain Reflectometry	283	(6)
TDR Theory	284	(3)
Measurement Factors	287	(2)
TDR Accuracy	289	(6)
Launch Parasitics	290	(2)
Probe Types	292	(1)
Reflections	293	(1)
Interface Transmission Loss	293	(1)
Cable Loss	294	(1)
Amplitude Offset Error	294	(1)
Impedance Measurement	295	(4)
Accurate Characterization of Impedance	295	(2)
Measurement Region in TDR Impedance Profile	297	(2)
Odd- and Even-Mode Impedance	299	(1)
Crosstalk Noise	299	(1)
Propagation Velocity	300	(3)
Length Difference Method	301	(1)
Y-Intercept Method	301	(1)
TDT Method	302	(1)
Vector Network Analyzer	303	(15)
Introduction to S Parameters	304	(1)
Equipment	305	(1)
One-Port Measurements (Zo,L,C)	305	(5)
Two-Port Measurements (Td, Attenuation, Crosstalk)	310	(4)
Calibration	314	(1)
Calibration for One-Part Measurements	315	(1)
Calibration for Two-Part Measurements	316	(1)
Calibration Verification	316	(2)
Appendix A: Alternative Characteristic Impedance Formulas	318	(3)
A.1 Microstrip	318	(1)
A.2 Symmetric Stripline	319	(1)
A.3 Offset Stripline	319	(2)
Appendix B: GTL Current-Mode Analysis	321	(8)
B.1 Basic GTL Operation	321	(2)
B.2 GTL Transitions When a Middle Agent Is Driving	323	(2)
B.3 GTL Transitions When an End Agent With a Termination Is Driving	325	(2)
B.4 Transitions When There is a Pull-Up at the Middle Agent	327	(2)
Appendix C: Frequency-Domain Components in a Digital Signal	329	(3)
Appendix D: Useful S-Parameter Conversions	332	(6)
D.1 ABCD, Z, and Y Parameters	332	(3)
D.2 Normalizing the S Matrix to a Different Characteristic Impedance	335	(1)
D.3 Derivation of the Formulas Used to Extract the Mutual Inductance and Capacitance from a Short Structure Using S21 Measurements	336	(1)
D.4 Derivation of the Formula to Extract Skin Effect Resistance from a Transmission Line	337	(1)
Appendix E: Definition of the Decibel	338	(2)
Appendix F: FCC Emission Limits	340	(2)
Bibliography	342	(3)
Index	345