Power Integrity Modeling and Design for Semiconductors and Systems

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  • Edition: 1st
  • Format: Hardcover
  • Copyright: 2007-11-19
  • Publisher: Prentice Hall
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Professionals such as signal integrity engineers, package designers, and system architects need to thoroughly understand signal and power integrity issues in order to successfully design packages and boards for high-speed systems. Now, for the first time, there's a complete guide to power integrity modeling: everything you need to know, from the basics through the state of the art.

Author Biography

Madhavan Swaminathan is Joseph M. Pettit Professor in Electronics at the School of Electrical and Computer Engineering, and Deputy Director of the Packaging Research Center at Georgia Tech. A. Ege Engin is Research Engineer in the School of Electrical and Computer Engineering and Assistant Research Director of the Packaging Research Center at Georgia Tech.

Table of Contents

Prefacep. xiii
Acknowledgmentsp. xvii
About the Authorsp. xxi
Basic Conceptsp. 1
Introductionp. 1
Functioning of Transistorsp. 1
What Are the Problems with Power Delivery?p. 4
Importance of Power Delivery in Microprocessors and ICsp. 5
Power Delivery Networkp. 6
Transients on the Power Supplyp. 8
Simple Relationships for Power Deliveryp. 10
Core Circuitsp. 10
I/O Circuitsp. 14
Delay Due to SSNp. 15
Timing and Voltage Margin Due to SSNp. 16
Relationship between Capacitor and Currentp. 17
Design of PDNsp. 17
Target Impedancep. 20
Impedance and Noise Voltagep. 22
Components of a PDNp. 24
Voltage Regulatorp. 24
Bypass or Decoupling Capacitorsp. 28
Package and Board Planesp. 37
On-Chip Power Distributionp. 42
PDN with Componentsp. 45
Analysis of PDNsp. 45
Single-Node Analysisp. 48
Distributed Analysisp. 55
Chip-Package Antiresonance: An Examplep. 61
High-Frequency Measurementsp. 65
Measurement of Impedancep. 66
Measurement of Self-Impedancep. 68
Measurement of Transfer Impedancep. 70
Measurement of Impedance by Completely Eliminating Probe Inductancep. 70
Signal Lines Referenced to Planesp. 71
Signal Lines as Transmission Linesp. 72
Relationship between Transmission-Line Parameters and SSNp. 74
Relationship between SSN and Return Path Discontinuitiesp. 75
PDN Modeling Methodologyp. 77
Summaryp. 79
Modeling of Planesp. 83
Introductionp. 83
Behavior of Planesp. 84
Frequency Domainp. 84
Time Domainp. 86
Two-Dimensional Planesp. 88
Lumped Modeling Using Partial Inductancesp. 89
Extracting the Inductance and Resistance Matricesp. 90
Distributed Circuit-Based Approachesp. 94
Modeling Using Transmission Linesp. 94
Transmission Matrix Method (TMM)p. 97
Frequency-Dependent Behavior of Unit-Cell Elementsp. 104
Modeling of Gaps in Planesp. 113
Discretization-Based Plane Modelsp. 117
Finite-Difference Methodp. 117
Finite-Difference Time-Domain Methodp. 128
Finite-Element Methodp. 132
Analytical Methodsp. 133
Cavity Resonator Methodp. 133
Network Representation of the Cavity Resonator Modelp. 135
Multiple Plane Pairsp. 138
Coupling through the Viasp. 141
Coupling through the Conductorsp. 154
Coupling through the Aperturesp. 158
Summaryp. 169
Simultaneous Switching Noisep. 175
Introductionp. 175
Methods for Modeling SSNp. 175
Simple Modelsp. 177
Modeling of Output Buffersp. 180
Modeling of Transmission Lines and Planesp. 185
Microstrip Configurationp. 186
Stripline Configurationp. 189
Conductor-Backed Coplanar Waveguide Configurationp. 205
Summary of Modal Decomposition Methodsp. 207
Application of Models in Time-Domain Analysisp. 209
Plane Bounce from Return Currentsp. 209
Microstrip-to-Microstrip Via Transitionp. 217
Split Planesp. 222
Application of Models in Frequency-Domain Analysisp. 226
Stripline between a Power and a Ground Planep. 226
Microstrip-to-Stripline Via Transitionp. 228
Reduction of Noise Coupling Using Thin Dielectricsp. 231
Extension of M-FDM to Incorporate Transmission Linesp. 233
Analysis of a Complex Board Designp. 236
Summaryp. 239
Time-Domain Simulation Methodsp. 243
Introductionp. 243
Rational Function Methodp. 244
Basic Theoryp. 244
Interpolation Schemesp. 246
Properties of Rational Functionsp. 252
Passivity Enforcementp. 257
Integration in a Circuit Solverp. 283
Disadvantagesp. 291
Signal Flow Graphsp. 295
Causalityp. 296
Transfer-Function Causalityp. 296
Minimum Phasep. 296
Delay Extraction from Frequency Responsep. 300
Causal Signal Flow Graphsp. 302
Computational Aspects in SFGp. 303
Fast Convolution Methodsp. 307
Cosimulation of Signal and Power Using SFGsp. 312
Modified Nodal Analysis (MNA)p. 317
What Is MNA?p. 317
Frequency Domainp. 318
Time Domainp. 320
MNA Formulation with S-Parametersp. 322
Summaryp. 327
Applicationsp. 333
Introductionp. 333
High-Speed Serversp. 334
Core PDN Noisep. 336
I/O PDN Noisep. 345
Summaryp. 349
High-Speed Differential Signalingp. 349
Test Vehicle Descriptionp. 350
Plane Modelingp. 352
Modeling of Master and Slave Islandsp. 358
Rational Function Modelingp. 361
Modal Decomposition and Noise Simulationp. 361
Summaryp. 364
Analysis of IC Packagesp. 365
Simulation of a Multilayered Package Using M-FDMp. 366
Causal Simulation of HyperBGA Packagep. 368
Summaryp. 372
Extraction of Dielectric Constant and Loss Tangentp. 372
Problem Definitionp. 373
Corner-to-Corner Plane-Probing Methodp. 378
Causal Model Developmentp. 386
Summaryp. 391
Embedded Decoupling Capacitorsp. 392
Embedded Individual Thin- or Thick-Film Capacitorsp. 394
Why Embed Individual Capacitorsp. 395
Design of an Embedded Thick-Film Capacitor Arrayp. 395
Integration of Embedded Capacitors into IBM Packagep. 400
Embedded Planar Capacitorsp. 404
Summaryp. 415
Electromagnetic Bandgap (EBG) Structuresp. 415
Basic Theoryp. 416
Response of EBG Structuresp. 417
Dispersion-Diagram Analysisp. 420
Modification of M-FDM Using Fringe and Gap Fieldsp. 424
Scalable Design of EBG Structures for Power Plane Isolationp. 430
Digital-RF Integrationp. 434
ADC Load-Board Designp. 436
Issues with EBG Structures for Digital Systemsp. 439
Summaryp. 442
Future Challengesp. 443
p. 451
Multiport Networksp. 451
Matrix Representation of Transmission Linesp. 453
Spectrum of Digital Signalsp. 454
Software listp. 459
Indexp. 461
Table of Contents provided by Ingram. All Rights Reserved.


During my (M.S.) undergraduate days in a little town called Tiruchirapalli in Southern India, we used to have frequent voltage and current surges that knocked out all the electrical equipment such as fans and lights in our rooms. Frustrated, my friend once remarked, "We arepowerlessto solve thecurrentproblem." Of course, he meant this in jest, but little did I realize that his statement would become the theme of my research for many years. Although my area of specialty is semiconductors and computer systems, the issues related to power haven't changed. Power represents the major bottleneck in modern semiconductors and systems. With transistor scaling over the last two decades, Moore's law has enabled the integration of millions of transistors within an integrated circuit. With lower gate capacitance and lower voltage, faster transistors have become available with each new generation of computers. However, increased transistor integration has resulted in an increase in the current supplied to the integrated circuit, thereby increasing power. Managing thetransient currentsupplied to the integrated circuit at gigahertz frequencies is one of the biggest challenges faced by the semiconductor industry. With lowering of the supply voltage to the transistors, dynamic variation in the power supply due to current transients is becoming a major bottleneck. The dynamic variation of the supply voltage, also called power supply noise, delta I noise, or simultaneous switching noise, is the subject of this book. Managing power integrity is the process by which the variations on the power supply of the transistors can be maintained within a specified tolerance value. Noise on the power supply can have a direct influence on the speed of an integrated circuit, and hence supplying clean power is a very important element in the design of a computer system. A power distribution network consists of interconnections in the chip, package, and board that include decoupling capacitors, ferrite beads, DC-DC converters, and other components. Both the package and board form a very critical part of the power distribution network, which is the focus of this book. The book covers two aspects of power distribution: design and modeling, with an emphasis on modeling. The book is organized into five chapters, which cover basic and advanced concepts. All chapters contain several examples to illustrate the concepts, some of which can be reproduced using the software provided. These examples can also be used to evaluate the accuracy and speed of several commercial tools that are available today. Chapter 1, "Basic Concepts," is for engineers and students who are entering the field of power integrity. The basic concepts are covered in this chapter, which includes a discussion on the fundamentals of power supply noise, its role in the speed of a computer system, the parasitics that produce it, and its effect on jitter and voltage margin for high-speed signal propagation. A power distribution network is best designed in the frequency domain, and the reasons for this are discussed in this chapter. The entire book is based on the parameter called target impedance, which can be used to evaluate the properties of a power distribution network. This parameter, developed in the mid-1990s, provides an elegant method of analysis, which can be used to understand the role of various components in the response of a power distribution network. The target impedance is therefore explained in detail in Chapter 1, with examples that can be reproduced using a circuit simulator such as Simulated Program with Integrated Circuit Emphasis (Spice). The concept of target impedance is used to promote better understanding of the placement of decoupling capacitors. The components of a power distribution network consist of several voltage regulator modules, decoupling capacitors, package and board interconnections, planes, and on-chip interconnection

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