System on Package Miniaturization of the Entire System

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  • Edition: 1st
  • Format: Hardcover
  • Copyright: 2008-05-06
  • Publisher: McGraw-Hill Education
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System-on-Package (SOP) is an emerging microelectronic technology that places an entire system on a single chip-size package. Where "systems" used to be bulky boxes housing hundreds of components, SOP saves interconnection time and heat generation by keep a full system with computing, communications, and consumer functions all in a single chip. Written by the Georgia Tech developers of the technology, this book explains the basic parameters, design functions, and manufacturing issues, showing electronic designers how this radical new packaging technology can be used to solve pressing electronics design challenges.

Author Biography

Madhavan Swaminathan is Joseph M. Pettit Professor in Electronics in the School of Electrical and Computer Engineering, and Deputy Director of the Microsystems Packaging Research Center, Georgia Tech.

Table of Contents

Forewordp. xvii
Prefacep. xix
Introduction to the System-on-Package (SOP) Technologyp. 3
Introductionp. 4
Electronic System Trend to Digital Convergencep. 5
Building Blocks of an Electronic Systemp. 7
System Technologies Evolutionp. 8
Five Major System Technologiesp. 11
System-on-Board (SOB) Technology with Discrete Componentsp. 11
System-on-Chip (SOC) with Two or More System Functions on a Single Chipp. 11
Multichip Module (MCM): Package-Enabled Integration of Two or More Chips Interconnected Horizontallyp. 13
Stacked ICs and Packages (SIP): Package-Enabled IC Integration with Two or More Chip Stacking (Moore's Law in the Third Dimension)p. 13
System-on-Package Technology (Module with the Best of IC and System Integration)p. 18
Miniaturization Trendp. 22
Comparison of the Five System Technologiesp. 23
Status of SOP around the Globep. 26
Opto SOPp. 26
RF SOPp. 28
Embedded Passives SOPp. 29
SOP Technology Implementationsp. 29
SOP Technologiesp. 33
Summaryp. 34
Acknowledgmentp. 34
Referencesp. 34
Introduction to System-on-Chip (SOC)p. 39
Introductionp. 40
Key Customer Requirementsp. 42
SOC Architecturep. 44
SOC Design Challengep. 50
SOC Design Phase 1-SOC Definition and Challengesp. 50
SOC Design Phase II-SOC Create Process and Challengesp. 57
Summaryp. 76
Referencesp. 76
Stacked ICs and Packages (SIP)p. 81
SIP Definitionp. 82
Definitionp. 82
Applicationsp. 82
CEO Figure and SIP Categoriesp. 82
SIP Challengesp. 85
Materials and Process Challengesp. 85
Mechanical Challengesp. 87
Electrical Challengesp. 88
Thermal Challengesp. 89
Non-TSV SIPp. 93
Historical Evolution of Non-TSV SIPp. 93
Chip Stackingp. 96
Package Stackingp. 113
Chip Stacking versus Package Stackingp. 120
TSV SIPp. 121
Introductionp. 121
Historical Evolution of 3D TSV Technologyp. 124
Basic TSV Technologiesp. 126
Different 3D Integration Technologies using TSVp. 134
Si Carrier Technologyp. 141
Future Trendsp. 143
Acknowledgmentsp. 144
Referencesp. 144
Mixed-Signal (SOP) Designp. 151
Introductionp. 152
Mixed-Signal Devices and Systemsp. 153
Importance of Integration in Mobile Applicationsp. 155
Mixed-Signal Architecturep. 156
Mixed-Signal Design Challengesp. 157
Fabrication Technologiesp. 159
Design of Embedded Passives in RF Front Endp. 160
Embedded Inductorsp. 161
Embedded Capacitorsp. 166
Embedded Filtersp. 167
Embedded Balunsp. 171
Filter-Balun Networksp. 175
Tunable Filtersp. 178
Chip-Package Codesignp. 180
Low Noise Amplifier Designp. 181
Concurrent Oscillator Designp. 184
Design of WLAN Front-End Modulep. 191
Design Toolsp. 194
Synthesis of Embedded RF Circuitsp. 195
Modeling of Signal and Power Delivery Networksp. 198
Rational Functions, Network Synthesis, and Transient Simulationp. 204
Design for Manufacturingp. 208
Couplingp. 214
Analog-to-Analog Couplingp. 214
Digital-to-Analog Couplingp. 222
Decouplingp. 227
Need for Decoupling in Digital Applicationsp. 228
Issues with SMD Capacitorsp. 229
Embedded Decouplingp. 230
Characterization of Embedded Capacitorsp. 235
Electromagnetic Bandgap (EBG) Structuresp. 239
Analysis and Design of EBG Structuresp. 242
Application of EBGs in Power Supply Noise Suppressionp. 246
Radiation Analysis of EBGsp. 248
Summaryp. 250
Acknowledgmentsp. 251
Referencesp. 251
Radio Frequency System-on-Package (RF SOP)p. 261
Introductionp. 262
RF SOP Conceptp. 262
Historical Evolution of RF Packaging Technologiesp. 265
RF SOP Technologiesp. 267
Modeling and Optimizationp. 267
RF Substrate Materials Technologiesp. 268
Antennasp. 269
Inductorsp. 278
RF Capacitorsp. 282
Resistorsp. 288
Filtersp. 295
Balunsp. 297
Combinersp. 298
RF MEMS Switchesp. 300
RFIDsp. 305
Integrated RF Modulesp. 308
WLANp. 308
Intelligent Network Communicator (INC)p. 310
Future Trendsp. 312
Acknowledgmentsp. 313
Referencesp. 314
Integrated Chip-to-Chip Optoelectronic SOPp. 321
Introductionp. 322
Applications of Optoelectronic SOPp. 323
High-Speed Digital Systems and High-Performance Computingp. 323
RF-Optical Communication Systemsp. 324
Integration Challenges in Thin-Film Optoelectronic SOPp. 325
Optical Alignmentp. 326
Key Physical and Optical Properties of Thin-Film Optical Waveguide Materialsp. 326
Advantages of Optoelectronic SOPp. 331
Comparison of High-Speed Electrical and Optical Wiring Performancep. 331
Wiring Densityp. 332
Power Dissipationp. 334
Reliabilityp. 335
Evolution of Optoelectronic SOP Technologyp. 336
Board-to-Board Optical Wiringp. 336
Chip-to-Chip Optical Interconnectsp. 339
Optoelectronic SOP Thin-Film Componentsp. 341
Passive Thin-Film Lightwave Circuitsp. 342
Active Optoelectronic SOP Thin-Film Componentsp. 354
Opportunities for 3D Lightwave Circuitsp. 355
SOP Integration: Interface Optical Couplingp. 357
On-Chip Optical Circuitsp. 363
Future Trends in Optoelectronic SOPp. 365
Summaryp. 365
Referencesp. 366
Table 6.1 Referencesp. 374
SOP Substrate with Multilayer Wiring and Thin-Film Embedded Componentsp. 377
Introductionp. 378
Historical Evolution of Substrate Integration Technologiesp. 380
SOP Substratep. 381
Drivers and Challengesp. 381
Ultrathin-Film Wiring with Embedded Low-K Dielectrics, Cores, and Conductorsp. 384
Embedded Passivesp. 415
Embedded Activesp. 430
Miniaturized Thermal Materials and Structuresp. 434
Future SOP Substrate Integrationp. 435
Acknowledgmentsp. 437
Referencesp. 437
Mixed-Signal (SOP) Reliabilityp. 443
System-Level Reliability Considerationsp. 445
Failure Mechanismsp. 446
Design-for-Reliabilityp. 447
Reliability Verificationp. 449
Reliability of Multifunction SOP Substratep. 450
Materials and Process Reliabilityp. 450
Digital Function Reliability and Verificationp. 458
RF Function Reliability and Verificationp. 461
Optical Function Reliability and Verificationp. 463
Multifunction System Reliabilityp. 467
Substrate-to-IC Interconnection Reliabilityp. 468
Factors Affecting the Substrate-to-IC Interconnection Reliabilityp. 469
100-żm Flip-Chip Assembly Reliabilityp. 471
Reliability against Die Crackingp. 476
Solder Joint Reliabilityp. 476
Interfacial Adhesion and Effect of Moisture on Underfill Reliabilityp. 478
Future Trends and Directionsp. 482
Extending Solderp. 483
Complaint Interconnectsp. 484
Alternative to Solder and Nano Interconnectsp. 484
Summaryp. 486
Referencesp. 487
MEMS Packagingp. 495
Introductionp. 496
Challenges in MEMS Packagingp. 497
Chip-Scale versus Wafer-Scale Packagingp. 497
Wafer Bonding Techniquesp. 499
Direct Bondingp. 500
Bonding Using Intermediate Layersp. 500
Sacrificial Film-Based Sealing Techniquesp. 505
Etching the Sacrificial Materialp. 505
Decomposition of Sacrificial Polymersp. 509
Low-Loss Polymer Encapsulation Techniquesp. 514
Techniques Utilizing Gettersp. 516
Nonevaporable Gettersp. 516
Thin-Film Gettersp. 517
Improving MEMS Reliability through Gettersp. 520
Interconnectionsp. 522
Assemblyp. 524
Summary and Future Trendsp. 527
Referencesp. 528
Wafer-Level SOPp. 535
Introductionp. 536
Definitionp. 536
Wafer-Level Packaging-Historical Evolutionp. 537
Buildup Wiring and Redistributionp. 540
IC-Package Pitch Gapp. 540
Redistribution Layers on Si to Close the Pitch Gapp. 543
Wafer-Level Thin-Film Embedded Componentsp. 544
Embedded Thin-Film Components in the ReDistribution Layer (RDL)p. 544
Wafer-Level Packaging and Interconnections (WLPI)p. 548
Classes of Wafer-Level Packaging and Interconnections (WLPI)p. 552
Rigid Interconnectionsp. 560
WLSOP Assemblyp. 585
WLSOPp. 590
Wafer-Level Probing and Burn-Inp. 591
Summaryp. 595
Acknowledgmentsp. 595
Referencesp. 595
Thermal SOPp. 605
Fundamentals of Thermal SOPp. 606
Thermal Implications of SOPp. 607
System-Level Thermal Constraints in SOP-Based Portablesp. 609
Thermal Sources in SOP Modulesp. 610
Digital SOPp. 611
RF SOPp. 613
Optoelectronic SOPp. 615
MEMS SOPp. 617
Fundamental Heat Transfer Modesp. 618
Conductionp. 618
Convectionp. 623
Radiationp. 626
Fundamentals of Thermal Characterizationp. 629
Numerical Methods for Thermal Characterizationp. 629
Experimental Methods for Thermal Characterizationp. 637
Thermal Management Technologiesp. 637
Thermal Design Methodologiesp. 638
Power Minimization Methodologiesp. 648
Parallel Processingp. 649
Dynamic Voltage and Frequency Scaling (DVFS)p. 649
Application-Specific Processors (ASP)p. 650
Cache Power Minimizationp. 650
Power Harnessingp. 651
Summaryp. 651
Acknowledgmentsp. 651
Referencesp. 652
Electrical Test of SOP Modules and Systemsp. 659
SOP Electrical Test Challengesp. 660
Objectives of the HVM Test Process and Challenges for SOPsp. 662
HVM Test Flow for SOPsp. 663
Known Good Embedded Substrate Testp. 664
Substrate Interconnect Testsp. 664
Testing Embedded Passivesp. 671
Known Good Embedded Module Test of Digital Subsystemsp. 677
Boundary Scan-IEEE 1149.1p. 677
Multi-gigahertz Digital Test: Recent Developmentsp. 681
KGEM Test of Mixed-Signal and RF Subsystemsp. 685
Test Strategiesp. 685
Fault Models and Test Qualityp. 688
Direct Measurement of Specifications Using Dedicated Circuitryp. 689
Alternate Testing Methods for Mixed-Signal and RF Circuitsp. 690
Summaryp. 707
Acknowledgmentsp. 707
Referencesp. 707
Biosensor SOPp. 717
Introduction to Biosensor SOPp. 717
SOP: A Highly Miniaturized Electronic System Technologyp. 717
Biosensor SOP for Miniaturized Biomedical Implants and Sensor Systemsp. 718
Building Blocks of Biosensor SOPp. 723
Biosensingp. 723
Microchannels for Biofluid Transportp. 723
Biosensing Element (Probe) Design and Preparationp. 724
Probe-Target Molecular Hybridizationp. 727
Signal Conversionp. 730
Nanomaterials and Nanostructures for Signal Conversion Componentsp. 730
Surface Modification and Biofunctionalization of Signal Conversion Componentp. 734
Signal Conversion Methodsp. 735
Signal Detection and Electronic Processingp. 741
Low-Power Application-Specific Integrated Circuits (ASICs) and Mixed-Signal Design for Biosensor SOPp. 741
Bio- SOP Substrate Integration Technologiesp. 744
Summary and Future Trendsp. 745
Nano Bio-SOP Integration Challengesp. 745
Referencesp. 746
Indexp. 749
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