Preface | |
Introduction | |
Fundamental Electrical Concepts | |
Introduction | |
Conventions | |
Charge, Current and Voltage | |
Power | |
Circuits, Nodes and Branches | |
Branch and Node Voltages | |
Kirchhoff's Voltage and Current Laws | |
Circuit Elements | |
Combining Circuit Elements | |
Voltage- and Current-Divider Circuits | |
Resistive-Circuit Examples | |
Power and Energy Relationships | |
Summary | |
Gate Delay and RC Circuits | |
Introduction: Delays in Logic Circuits | |
Transition Times in CMOS | |
Inside the CMOS Inverter | |
Solving First Order RC Circuits | |
RC Delays in Integrated Circuits | |
Significance of the Time Constant | |
Maximum-Inverter Pair Switching Speed | |
Algebraic Analysis of Inverter Pair Switching Speed | |
Energy and Power Dissipation in Digital Systems | |
Other First-Order RC Circuits | |
Summary | |
Interconnects and RC Ladder Circuits | |
Introduction | |
Resistance and Capacitance of Interconnects | |
Interconnect Models | |
Single-RC-Lump Approximation of an Interconnect | |
Two-RC-Lump Interconnect Approximation | |
Analysis of the Two-Section-RC Ladder Circuit | |
Natural Frequencies and Higher Order Circuits | |
Timing Delays Using the Two-Lump Model | |
Timing Delays Using Higher-Order Interconnect Models | |
Summary | |
Fanout and Capacitive Coupling | |
Introduction | |
Fanout | |
Fanout and Interconnects | |
Capacitive Coupling and Crosstalk | |
Capacitive Coupling to a Grounded Adjacent Line | |
Capacitive Coupling to a Floating Adjacent Line | |
Capacitive Coupling to an Adjacent Active Line | |
The Capacitance Matrix | |
Summary | |
Package Inductance and RLC Circuit Analysis | |
Introduction | |
Modelling the Effects of Package Inductance | |
First-Order RL Circuits | |
RLC Circuit Model of Coupled Inverter Gates | |
dc Steady-State Response of RLC Circuits | |
Series RLC Circuit Differential Equations | |
Natural Frequencies of the Series RLC Circuit | |
Series RLC Circuit Responses | |
Application to the Digital-System Switching Speed | |
Gate Conductance and RLGC Circuits | |
Neglecting Unimportant Components in Circuit Analysis | |
Summary | |
Printed Circuit Interconnects an Lossless Transmission Lines | |
Introduction | |
n-lump Transmission Line Model | |
Analysis of the Lossless Transmission-Line Model | |
Interpretation of the Wave Solutions | |
Reflections on Transmission Lines | |
Transmission-Line Models | |
Solving Circuits with Transmission Lines | |
Capacitively Loaded Transmission Line | |
Summary | |
Clock Skew and Signal Representation | |
Introduction | |
Clock Skew in Synchronous Logic Circuits | |
Periodic Signals | |
Time-Domain Analysis of Clock Skew | |
The Big Picture | |
Fourier Series Signal Representation | |
Superposition | |
Complex Form of the Fourier Series | |
Summary | |
Clock Degradation and ac Steady State Analysis | |
Introduction | |
Sinusoids and Phasors | |
Impedance and Admittance | |
Clock-Signal Analysis Using ac Steady-State Theory | |
Transfer Functions | |
RLC Circuits in the Frequency Domain | |
Ac Steady-State Analysis Using Complex Fourier Series | |
Summary | |
Other Circuit Analysis Concepts | |
Introduction | |
Thevenin and Norton Equivalent Models | |
Controlled Sources | |
Root-Mean-Square Values | |
Nodal Analysis | |
Summary | |
Selected Answers | |
Index | |
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