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9781558604285

Computer Organization and Design : The Hardware/Software Interface

by
  • ISBN13:

    9781558604285

  • ISBN10:

    1558604286

  • Edition: 2nd
  • Format: Hardcover
  • Copyright: 1997-08-01
  • Publisher: Elsevier Science Ltd
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Summary

The performance of software systems is dramatically affected by how well software designers understand the basic hardware technologies at work in a system. Similarly, hardware designers must understand the far reaching effects their design decisions have on software applications. For readers in either category, this classic introduction to the field provides a deep look into the computer. It demonstrates the relationship between the software and hardware and focuses on the foundational concepts that are the basis for current computer design. Using a distinctive "learning by evolution" approach the authors present each idea from its first principles, guiding readers through a series of worked examples that incrementally add more complex instructions until they have acquired an understanding of the entire MIPS instruction set and the fundamentals of assembly language. Computer arithmetic, pipelining, and memory hierarchies are treated to the same evolutionary approach with worked examples and incremental drawings supporting each new level of sophistication. The design, performance, and significance of I/O systems is also discussed in depth, and an entire chapter is devoted to the emerging architectures of multiprocessor systems. * Real Stuff provides relevant, tangible examples of how the concepts from the chapter are implemented in commercially successful products. * Fallacies and Pitfalls share the hard-won lessons of the authors and other designers in industry. * Big Pictures allow the reader to keep major insights in focus while studying the details. * Key terms, all fully defined in an end-of-book glossary, summarize the essential ideas introduced in the chapter.

Author Biography

John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the department of electrical engineering and computer science. David A. Patterson is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the A.C.M.

Table of Contents

Foreword vi(7)
John H. Crawford
Worked Examples xiii(3)
Computer Organization and Design Online xvi(3)
Preface xix
1 Computer Abstractions and Technology
2(50)
1.1 Introduction
3(2)
1.2 Below Your Program
5(5)
1.3 Under the Covers
10(11)
1.4 Integrated Circuits: Fueling Innovation
21(3)
1.5 Real Stuff: Manufacturing Pentium Chips
24(5)
1.6 Fallacies and Pitfalls
29(1)
1.7 Concluding Remarks
30(2)
1.8 Historical Perspective and Further Reading
32(12)
1.9 Key Terms
44(1)
1.10 Exercises
45(7)
2 The Role of Performance
52(52)
2.1 Introduction
54(4)
2.2 Measuring Performance
58(2)
2.3 Relating the Metrics
60(6)
2.4 Choosing Programs to Evaluate Performance
66(3)
2.5 Comparing and Summarizing Performance
69(2)
2.6 Real Stuff: The SPEC95 Benchmarks and Performance of Recent Processors
71(4)
2.7 Fallacies and Pitfalls
75(7)
2.8 Concluding Remarks
82(1)
2.9 Historical Perspective and Further Reading
83(6)
2.10 Key Terms
89(1)
2.11 Exercises
90(14)
3 Instructions: Language of the Machine
104(104)
3.1 Introduction
106(1)
3.2 Operations of the Computer Hardware
107(2)
3.3 Operands of the Computer Hardware
109(7)
3.4 Representing Instructions in the Computer
116(6)
3.5 Instructions for Making Decisions
122(10)
3.6 Supporting Procedures in Computer Hardware
132(10)
3.7 Beyond Numbers
142(3)
3.8 Other Styles of MIPS Addressing
145(11)
3.9 Starting a Program
156(7)
3.10 An Example to Put It All Together
163(8)
3.11 Arrays versus Pointers
171(4)
3.12 Real Stuff: PowerPC and 80x86 Instructions
175(10)
3.13 Fallacies and Pitfalls
185(2)
3.14 Concluding Remarks
187(2)
3.15 Historical Perspective and Further Reading
189(7)
3.16 Key Terms
196(1)
3.17 Exercises
196(12)
4 Arithmetic for Computers
208(128)
4.1 Introduction
210(1)
4.2 Signed and Unsigned Numbers
210(10)
4.3 Addition and Subtraction
220(5)
4.4 Logical Operations
225(5)
4.5 Constructing an Arithmetic Logic Unit
230(20)
4.6 Multiplication
250(15)
4.7 Division
265(10)
4.8 Floating Point
275(26)
4.9 Real Stuff: Floating Point in the PowerPC and 80x86
301(3)
4.10 Fallacies and Pitfalls
304(4)
4.11 Concluding Remarks
308(4)
4.12 Historical Perspective and Further Reading
312(10)
4.13 Key Terms
322(1)
4.14 Exercises
322(14)
5 The Processor: Datapath and Control
336(98)
5.1 Introduction
338(5)
5.2 Building a Datapath
343(8)
5.3 A Simple Implementation Scheme
351(26)
5.4 A Multicycle Implementation
377(22)
5.5 Microprogramming: Simplifying Control Design
399(11)
5.6 Exceptions
410(6)
5.7 Real Stuff: The Pentium Pro Implementation
416(3)
5.8 Fallacies and Pitfalls
419(2)
5.9 Concluding Remarks
421(2)
5.10 Historical Perspective and Further Reading
423(3)
5.11 Key Terms
426(1)
5.12 Exercises
427(7)
6 Enhancing Performance with Pipelining
434(104)
6.1 An Overview of Pipelining
436(13)
6.2 A Pipelined Datapath
449(17)
6.3 Pipelined Control
466(10)
6.4 Data Hazards and Forwarding
476(13)
6.5 Data Hazards and Stalls
489(7)
6.6 Branch Hazards
496(9)
6.7 Exceptions
505(5)
6.8 Superscalar and Dynamic Pipelining
510(7)
6.9 Real Stuff: PowerPC 604 and Pentium Pro Pipelines
517(3)
6.10 Fallacies and Pitfalls
520(1)
6.11 Concluding Remarks
521(4)
6.12 Historical Perspective and Further Reading
525(4)
6.13 Key Terms
529(1)
6.14 Exercises
529(9)
7 Large and Fast: Exploiting Memory Hierarchy
538(98)
7.1 Introduction
540(5)
7.2 The Basics of Caches
545(19)
7.3 Measuring and Improving Cache Performance
564(15)
7.4 Virtual Memory
579(24)
7.5 A Common Framework for Memory Hierarchies
603(8)
7.6 Real Stuff: The Pentium Pro and PowerPC 604 Memory Hierarchies
611(4)
7.7 Fallacies and Pitfalls
615(3)
7.8 Concluding Remarks
618(3)
7.9 Historical Perspective and Further Reading
621(6)
7.10 Key Terms
627(1)
7.11 Exercises
628(8)
8 Interfacing Processors and Peripherals
636(74)
8.1 Introduction
638(3)
8.2 I/O Performance Measures: Some Examples from Disk and File Systems
641(3)
8.3 Types and Characteristics of I/O Devices
644(11)
8.4 Buses: Connecting I/O Devices to Processor and Memory
655(18)
8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System
673(11)
8.6 Designing an I/O System
684(3)
8.7 Real Stuff: A Typical Desktop I/O System
687(1)
8.8 Fallacies and Pitfalls
688(2)
8.9 Concluding Remarks
690(4)
8.10 Historical Perspective and Further Reading
694(6)
8.11 Key Terms
700(1)
8.12 Exercises
700(10)
9 Multiprocessors
710
9.1 Introduction
712(2)
9.2 Programming Multiprocessors
714(3)
9.3 Multiprocessors Connected by a Single Bus
717(10)
9.4 Multiprocessors Connected by a Network
727(7)
9.5 Clusters
734(2)
9.6 Network Topologies
736(4)
9.7 Real Stuff: Future Directions for Multiprocessors
740(3)
9.8 Fallacies and Pitfalls
743(3)
9.9 Concluding Remarks--Evolution versus Revolution in Computer Architecture
746(2)
9.10 Historical Perspective and Further Reading
748(8)
9.11 Key Terms
756(1)
9.12 Exercises
756
APPENDICES
A Assemblers, Linkers, and the SPIM Simulator A-2
James R. Larus, University of Wisconsin
A.1 Introduction A-3
A.2 Assemblers A-10
A.3 Linkers A-17
A.4 Loading A-19
A.5 Memory Usage A-20
A.6 Procedure Call Convention A-22
A.7 Exceptions and Interrupts A-32
A.8 Input and Output A-36
A.9 SPIM A-38
A.10 MIPS R2000 Assembly Language A-49
A.11 Concluding Remarks A-75
A.12 Key Terms A-76
A.13 Exercises A-76
B The Basics of Logic Design B-2
B.1 Introduction B-3
B.2 Gates, Truth Tables, and Logic Equations B-4
B.3 Combinational Logic B-8
B.4 Clocks B-18
B.5 Memory Elements B-21
B.6 Finite State Machines B-35
B.7 Timing Methodologies B-39
B.8 Concluding Remarks B-44
B.9 Key Terms B-45
B.10 Exercises B-45
C Mapping Control to Hardware C-2
C.1 Introduction C-3
C.2 Implementing Combinational Control Units C-4
C.3 Implementing Finite State Machine Control C-8
C.4 Implementing the Next-State Function with a Sequencer C-21
C.5 Translating a Microprogram to Hardware C-28
C.6 Concluding Remarks C-31
C.7 Key Terms C-32
C.8 Exercises C-32
Glossary G-1
Index I-1

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