Design Of Wireless Autonomous Datalogger Ic's

by Claes, Wim; Sansen, Willy M. C.; Puers, Robert

• ISBN13: 9781402032080
• ISBN10: 1402032080
• Format: Hardcover
• Copyright: 2005-07-30
• Publisher: Kluwer Academic Pub

Summary

Design of Wireless Autonomous Dataloggers IC's reveals the state of the art in the design of complex dataloggers, with a special focus on low power consumption. The emphasis is on autonomous dataloggers for stand-alone applications with remote reprogrammability.The book starts with a comprehensive introduction on the most important design aspects and trade-offs for miniaturized low-power telemetric dataloggers. After the general introduction follows an in-depth case study of an autonomous CMOS datalogger IC for the registration of in vivo loads on oral implants. After tackling the design of the datalogger on the system level, the design of the different building blocks is elaborated in detail, with emphasis on low power.A clear overview of the operation, the implementation, and the most important design considerations of the building blocks to achieve optimal system performance is given. Design of Wireless Autonomous Dataloggers IC's discusses the design of correlated double sampling amplifiers and sample-and-holds, binary-weighted current steering DACs, successive approximation ADCs and relaxation clock oscillators and can also be used as a manual for the design of these building blocks.Design of Wireless Autonomous Dataloggers IC's covers the complete design flow of low-power miniaturized autonomous dataloggers with a bi-directional wireless link and on-board data processing, while providing detailed insight into the most critical design issues of the different building blocks. It will allow you to design complex dataloggers faster. It is essential reading for analog design engineers and researchers in the field of miniaturized dataloggers and is also suitable as a text for an advanced course on the subject.

Table of Contents

Abstract	v
List of Abbreviations and Symbols	vii
Table of Contents	xiii
1 Introduction	1	(2)
2 General design aspects of miniaturized low-power dataloggers	3	(24)
2.1 Introduction	3	(1)
2.2 Biotelemetry systems	4	(1)
2.3 Dataloggers	5	(10)
2.3.1 Sensors	6	(1)
2.3.2 Signal conditioning	7	(3)
2.3.3 Data processing	10	(1)
2.3.4 Power source	11	(1)
2.3.5 Transceiver	12	(1)
2.3.6 Packaging	13	(1)
2.3.7 Smart sensors	13	(2)
2.4 An injectable transponder example: from prototype to commercial device	15	(8)
2.4.1 Prototype development: DEVICE 3	15	(4)
2.4.1.1 General overview	15	(1)
2.4.1.2 Modes of operation	15	(2)
2.4.1.3 Practical realization and problems	17	(2)
2.4.2 Market introduction: DEVICE 4	19	(37)
2.4.2.1 Modifications	19	(1)
2.4.2.2 Sensor channels	20	(1)
2.4.2.3 Practical realization	21	(2)
2.5 Conclusion	23	(4)
3 Miniaturized datalogger for stress monitoring in oral implants	27	(26)
3.1 Introduction	27	(1)
3.2 Clinical background and motivation	27	(5)
3.3 Measurement methodology	32	(7)
3.4 External measurement system	39	(2)
3.5 Strain gauges	41	(6)
3.6 Specifications of the new miniaturized datalogger	47	(3)
3.7 Conclusion	50	(3)
4 Multi-gauge offset-compensated sensor interface chip	53	(82)
4.1 Introduction	53	(1)
4.2 Measurement/compensation setup	53	(3)
4.3 Sensor interface building blocks	56	(68)
4.3.1 Reference current source	56	(9)
4.3.1.1 Operating principle	56	(2)
4.3.1.2 Accuracy and mismatch	58	(1)
4.3.1.3 Supply-voltage dependence	59	(2)
4.3.1.4 Temperature dependence	61	(2)
4.3.1.5 Current mirror inaccuracy	63	(2)
4.3.2 DAC	65	(9)
4.3.2.1 DAC requirements	65	(3)
4.3.2.2 Operating principle and implementation	68	(5)
4.3.2.3 Derivation and accuracy of the new unit current source	73	(1)
4.3.3 PROG/SEL-block	74	(3)
4.3.3.1 Implementation	74	(3)
4.3.3.2 Programming protocol	77	(1)
4.3.4 Amplifier	77	(24)
4.3.4.1 Operating principle	77	(3)
4.3.4.2 MUX	80	(1)
4.3.4.3 Finite OTA gain	81	(2)
4.3.4.4 Settling behavior	83	(5)
4.3.4.5 Switches	88	(2)
4.3.4.6 Clock feedthrough and charge injection	90	(2)
4.3.4.7 Noise	92	(3)
4.3.4.8 Distortion	95	(3)
4.3.4.9 CMRR and PSRR	98	(3)
4.3.5 S/H	101	(5)
4.3.5.1 Operating principle	101	(1)
4.3.5.2 Finite OTA gain	102	(1)
4.3.5.3 Settling behavior	103	(2)
4.3.5.4 Noise	105	(1)
4.3.6 ADC	106	(14)
4.3.6.1 Operating principle	106	(2)
4.3.6.2 Charge redistribution DAC	108	(3)
4.3.6.3 Comparator	111	(2)
4.3.6.4 Reference current source	113	(2)
4.3.6.5 Settling behavior	115	(3)
4.3.6.6 Noise	118	(2)
4.3.7 Oscillator	120	(5)
4.3.7.1 Operating principle and implementation	120	(2)
4.3.7.2 Non-overlapping clock generators and φsample	122	(2)
4.4 Layout	124	(1)
4.5 Experimental results	125	(6)
4.5.1 Current consumption	125	(2)
4.5.2 Clock	127	(1)
4.5.3 ADC performance	127	(2)
4.5.4 DAC performance	129	(1)
4.5.5 Static measurements	129	(1)
4.5.6 Dynamic measurements	130	(1)
4.6 Conclusion	131	(4)
5 Intelligent-datalogger IC with programmable data processing	135	(32)
5.1 Introduction	135	(1)
5.2 Principle of operation	135	(2)
5.2.1 System overview	135	(1)
5.2.2 Operation modes	136	(1)
5.3 Digital part and external SRAM	137	(2)
5.4 Transceiver	139	(3)
5.5 Instruction set	142	(2)
5.6 Building blocks of the digital part	144	(14)
5.6.1 Programming and nulling units	144	(2)
5.6.2 Data processing unit	146	(4)
5.6.3 Sampling unit	150	(1)
5.6.4 Receiving and transmission units	151	(7)
5.7 Implementation and layout	158	(2)
5.8 Experimental results	160	(4)
5.9 Future work: packaging	164	(1)
5.10 Conclusion	164	(3)
6 Conclusion	167	(4)
A Transistor dimensions	171	(6)
B Digital error correction of ADC	177	(2)
C Sampling unit	179	(8)
C.1 VHDL code	179	(6)
C.2 Flowchart	185	(2)
List of Publications	187	(2)
Bibliography	189	(8)
Index	197