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9783540677703

Computer Aided Verification: 12th International Conference, Cav 2000 Chicago, Il, Usa, July 15-19,2000 Proceedings

by ;
  • ISBN13:

    9783540677703

  • ISBN10:

    3540677704

  • Format: Paperback
  • Copyright: 2000-07-01
  • Publisher: Springer-Verlag New York Inc
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Summary

This book constitutes the refereed proceedings of the 12th International Conference on Computer Aided Verification, CAV 2000, held in Chicago, IL, USA in July 2000. The 35 revised full papers presented together with 9 tool papers were carefully reviewed and selected from 91 submissions. The papers address all current aspects of the theory and practice of formal methods for hardware and software verification. Emphasis is given to verification algorithms, methods, and tools and their implementation.

Table of Contents

Invited Talks and Tutorials
Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion
1(1)
A. Pnueli
Invited Address: Applying Formal Methods to Cryptographic Protocol Analysis
2(1)
C. Meadows
Invited Tutorial: Boolean Satisfiability Algorithms and Applications in Electronic Design Automation
3(1)
J. Marques-Silva
K. Sakallah
Invited Tutorial: Verification of Infinite-State and Parameterized Systems
4(1)
P.A. Abdulla
B. Jonsson
Regular Papers
An Abstraction Algorithm for the Verification of Generalized C-Slow Designs
5(15)
J. Baumgartner
A. Tripp
A. Aziz
V. Singhal
F. Andersen
Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits
20(16)
T. Heyman
D. Geist
O. Grumberg
A. Schuster
An Automata-Theoretic Approach to Reasoning about Infinite-State Systems
36(17)
O. Kupferman
M.Y. Vardi
Automatic Verification of Parameterized Cache Coherence Protocols
53(16)
G. Delzanno
Binary Reachability Analysis of Discrete Pushdown Timed Automata
69(16)
Z. Dang
O.H. Ibarra
T. Bultan
R.A. Kemmerer
J. Su
Boolean Satisfiability with Transitivity Constraints
85(14)
R.E. Bryant
M.N. Velev
Bounded Model Construction for Monadic Second-Order Logics
99(14)
A. Ayari
D. Basin
Building Circuits from Relations
113(11)
J.H. Kukula
T.R. Shiple
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
124(15)
P.F. Williams
A. Biere
E.M. Clarke
A. Gupta
On the Completeness of Compositional Reasoning
139(15)
K.S. Namjoshi
R.J. Trefler
Counterexample-Guided Abstraction Refinement
154(16)
E. Clarke
O. Grumberg
S. Jha
Y. Lu
H. Veith
Decision Procedures for Inductive Boolean Functions Based on Alternating Automata
170(16)
A. Ayari
D. Basin
F. Klaedtke
Detecting Errors Before Reaching Them
186(16)
L. de Alfaro
T.A. Henzinger
F.Y.C. Mang
A Discrete Strategy Improvement Algorithm for Solving Parity Games
202(14)
J. Voge
M. Jurdzinski
Distributing Timed Model Checking-How the Search Order Matters
216(16)
G. Behramann
T. Hune
F. Vaandrager
Efficient Algorithms for Model Checking Pushdown Systems
232(16)
J. Esparza
D. Hansel
P. Rossmanith
S. Schwoon
Efficient Buchi Automata from LTL Formulae
248(16)
F. Somenzi
R. Bloem
Efficient Detection of Global Properties in Distributed Systems Using Partial-Order Methods
264(16)
S.D. Stoller
L. Unnikrishnan
Y.A. Liu
Efficient Reachability Analysis of Hierarchical Reactive Machines
280(16)
R. Alur
R. Grosu
M. McDougall
Formal Verification of VLIW Microprocessors with Speculative Execution
296(16)
M.N. Velev
Induction in Compositional Model Checking
312(16)
K.L. McMillan
S. Qadeer
J.B. Saxe
Liveness and Acceleration in Parameterized Verification
328(16)
A. Pnueli
E. Shahar
Mechanical Verification of an Ideal Incremental ABR Conformance Algorithm
344(14)
M. Rusinowitch
S. Stratulat
F. Klay
Model Checking Continuous-Time Markov Chains by Transient Analysis
358(15)
C. Baier
B. Haverkort
H. Hermanns
J.-P. Katoen
Model-Checking for Hybrid Systems by Quotienting and Constraints Solving
373(16)
F. Cassez
F. Laroussinie
Prioritized Traversal: Efficient Reachability Analysis for Verification and Falsification
389(14)
R. Fraer
G. Kamhi
B. Ziv
M.Y. Vardi
L. Fix
Regular Model Checking
403(16)
A. Bouajjani
B. Jonsson
M. Nilsson
T. Touili
Symbolic Techniques for Parametric Reasoning about Counter and Clock Systems
419(16)
A. Annichini
E. Asarin
A. Bouajjani
Syntactic Program Transformations for Automatic Abstraction
435(15)
K.S. Namjoshi
R.P. Kurshan
Temporal-Logic Queries
450(14)
W. Chan
Are Timed Automata Updatable?
464(16)
P. Bouyer
C. Dufourd
E. Fleury
A. Petit
Tuning SAT Checkers for Bounded Model Checking
480(15)
O. Shtrichman
Unfoldings of Unbounded Petri Nets
495(13)
P.A. Abdulla
S.P. Iyer
A. Nylen
Verification Diagrams Revisited: Disjunctive Invariants for Easy Verification
508(13)
J. Rushby
Verifying Advanced Microarchitectures that Support Speculation and Exceptions
521(17)
R. Hosabettu
G. Gopalakrishnan
M. Srivas
Tool Papers
FoCs: Automatic Generation of Simulation Checkers from Formal Specifications
538(5)
Y. Abarbanel
I. Beer
L. Gluhovsky
S. Keidar
Y. Wolfsthal
IF: A Validation Environment for Timed Asynchronous Systems
543(5)
M. Bozga
J.-C. Fernandez
L. Ghirvu
S. Graf
J.-P. Krimm
L. Mounier
Integrating WSIS with PVS
548(4)
S. Owre
H. Rueß
PET: An Interactive Software Testing Tool
552(5)
E. Gunter
R. Kurshan
D. Peled
A Proof-Carrying Code Architecture for Java
557(4)
C. Colby
P. Lee
G.C. Necula
The Statemate Verification Environment-Making It Real
561(7)
T. Bienmuller
W. Damm
H. Wittke
TAPS: A First-Order Verifier for Cryptographic Protocols
568(4)
E. Cohen
VINAS-P: A Tool for Trace Theoretic Verification of Timed Asynchronous Circuits
572(4)
T. Yoneda
XMC: A Logic-Programming-Based Verification Toolset
576(5)
C.R. Ramakrishnan
I.V. Ramakrishnan
S.A. Smolka
Y. Dong
X. Du
A. Roychoudhury
V.N. Venkatakrishnan
Author Index 581

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