Sigma Delta A/d Conversion for Signal Conditioning

by Philips, Kathleen; Van Roermund, Arthur H. M.

• ISBN13: 9781402046797
• ISBN10: 1402046790
• Format: Hardcover
• Copyright: 2006-05-15
• Publisher: Springer Verlag

Summary

SigmaDelta A/D Conversion for Signal Conditioning addresses the application of continuous-time SigmaDelta A/D converters in receivers for a.o. wireless communication. In particular, it focuses on their assets for digitizing such channels. The book gives an overview of the state-of-the-art in SigmaDelta design and of the challenges for future realizations. It provides an understanding of the fundamental power efficiency of SigmaDelta converters. In addition, it presents an analysis of the power consumption in the decimation filter. Understanding these power/performance trade-offs, it becomes clear that straight-forward digitization of a conditioning channel, i.e. exchanging analog for digital conditioning, comes at a major power penalty. This book proposes an alternative vision on digitization: because of its inherent immunity to interferers, part of the signal conditioning can be integrated into the continuous-time SigmaDelta A/D converter. This approach results in a major improvement of the power/performance balance of the entire channel. The various aspects of the interferer immunity of the converter are analyzed in much detail and improved SigmaDelta topologies with even higher immunity are presented. Design examples for highly digitized AM/FM and Bluetooth radios serve as an illustration. The examples include detailed circuit diagrams, simulation and test results, as well as an evaluation of the SigmaDelta-based conditioning channel as compared to more conventional solutions. The book is essential reading for mixed-signal and RF designers who want to familiarize with the basics of SigmaDelta design. For the experienced designer and for the system architect, the book provides an in-depth understanding of the major assets of SigmaDelta converters in digitized receivers.

Author Biography

Kathleen Philips was born in 1972, in Aalst, Belgium. In 1992 and in 1995, respectively, she obtained the B. Sc. and the M. Sc. degree in Electrical Engineering from the "Katholieke Universiteit Leuven" in Belgium. The graduation project was on the design of monolithic microwave ICs based on HEMT-transistors.In the summer of 1993, she did a traineeship at the IMEC, Belgium, on methodologies to evaluate contamination in IC technology steps. In September 1995, she started working in the Mixed-signal Circuits and Systems group of the Philips Research Laboratories in Eindhoven, the Netherlands, where she is now a senior research scientist. She respectively worked on the design of D/A converters and class-D amplifiers for audio, sigma delta A/D conversion for FM and AMradio, variable-gain amplifiers, sigma delta design for UMTS and for Bluetooth receivers. Her research interests also include the system-level design of transceivers for wireless communication.In the fall of 1997, she was seconded to Philips Semiconductors, France, on the topic of PLL design. Another secondment in 2000, to the Philips Research Laboratories in the United Kingdom, involved the study of third-generation mobile receivers and the derivation of circuit specifications.The author was a lecturer in the Educational Sessions of the IEEE Custom Integrated Circuits Conference in 2003 and 2004. From 2005 on, she also serves in the technical program committee of this conference.

Table of Contents

List of symbols and abbreviations	ix
1 Introduction	1	(8)
1.1 Background	1	(3)
1.2 Scope	4	(2)
1.3 Outline	6	(3)
2 The signal conditioning channel	9	(12)
2.1 Generic communication channel	9	(1)
2.2 Performance parameters	10	(1)
2.3 Conventional conditioning channels	10	(1)
2.4 Evolution	11	(6)
2.4.1 Technology advances	12	(1)
2.4.2 System demands	13	(1)
2.4.3 Advances in digital signal processing and analog circuit design	14	(1)
2.4.4 Digitization of the architecture	14	(3)
2.5 Nomenclature	17	(2)
2.6 Conclusions	19	(2)
3 ΣΔ A/D conversion	21	(16)
3.1 Historical overview	21	(1)
3.2 State-of-the-art in ΣΔ A/D conversion	22	(7)
3.2.1 Architectural considerations	23	(3)
3.2.2 Implementation aspects	26	(2)
3.2.3 Performance metrics for ΣΔ ADCs	28	(1)
3.3 ΣΔ ADCs in future conditioning channels	29	(3)
3.3.1 The Shannon theorem and ΣΔ based signal conditioning	29	(1)
3.3.2 Comparison of Nyquist and ΣΔ based signal conditioning	30	(2)
3.3.3 Survey of published power/performance values	32	(1)
3.4 Limitations of ΣΔ A/D conversion	32	(2)
3.4.1 Linear limitations	33	(1)
3.4.2 Non-linear limitations	33	(1)
3.5 Conclusions	34	(3)
4 Power consumption in channel building blocks	37	(20)
4.1 Literature on power/performance analysis	37	(1)
4.2 Figures-of-merit	38	(3)
4.2.1 FOM related to thermal noise	38	(1)
4.2.2 FOM including distortion	39	(1)
4.2.3 FOM related to signal resolution	39	(2)
4.3 Power consumption in analog conditioning circuits	41	(3)
4.3.1 Power/performance relations	41	(1)
4.3.2 Discussion	42	(2)
4.4 Power consumption in a EA ADC	44	(3)
4.4.1 Power/performance relations	44	(1)
4.4.2 Discussion	45	(2)
4.5 Power consumption in digital conditioning circuits	47	(5)
4.5.1 Filter functions	49	(1)
4.5.2 Power/performance relations	50	(1)
4.5.3 Discussion	50	(2)
4.6 Comparison	52	(3)
4.7 Conclusions	55	(2)
5 Full-analog and full-digital conditioning channels	57	(10)
5.1 Full-analog conditioning channel	57	(2)
5.1.1 The conditioning channel	58	(1)
5.2 Full-digital conditioning channel	59	(6)
5.2.1 The conditioning channel	59	(2)
5.2.2 Power/performance analysis	61	(4)
5.3 Conclusions	65	(2)
6 Conditioning ΣΔ ADCs	67	(38)
6.1 Generic conditioning ΣΔ ADC	67	(12)
6.1.1 Concept of operation	67	(5)
6.1.2 Universal model of a ΣΔ modulator	72	(1)
6.1.3 Interferer immunity	72	(5)
6.1.4 Power/performance analysis	77	(2)
6.2 Signal conditioning in the decimation filter	79	(5)
6.2.1 Interferer immunity	80	(1)
6.2.2 The conditioning channel	81	(1)
6.2.3 Power/performance analysis	82	(2)
6.3 Signal conditioning with a restricted filtering STF	84	(10)
6.3.1 Interferer immunity	85	(2)
6.3.2 The conditioning channel	87	(2)
6.3.3 Power/performance analysis	89	(3)
6.3.4 Conditioning hybrid ΣΔ ADC	92	(2)
6.4 Signal conditioning by unrestricted STF design	94	(5)
6.4.1 Interferer immunity	96	(2)
6.4.2 The conditioning channel	98	(1)
6.4.3 Power/performance analysis	98	(1)
6.5 Comparison of conditioning ADCs	99	(4)
6.5.1 Comparison of topologies	100	(1)
6.5.2 Flexibility	101	(1)
6.5.3 Power consumption	102	(1)
6.5.4 Guidelines	103	(1)
6.6 Conclusions	103	(2)
7 Digitization of the inter-die interface	105	(8)
7.1 Considerations	105	(1)
7.2 Power in the interface	106	(4)
7.2.1 Analog interface	108	(1)
7.2.2 Digital interface after decimation	108	(1)
7.2.3 Digital interface before decimation	108	(2)
7.2.4 Comparison	110	(1)
7.3 Application to the conditioning channels	110	(1)
7.4 Conclusions	111	(2)
8 Highly analog and highly digital channels for FM/AM radio	113	(26)
8.1 System	113	(3)
8.1.1 Conventional radio with analog demodulation	114	(1)
8.1.2 Radio with digital demodulation	115	(1)
8.2 VGA design	116	(8)
8.2.1 Highly linear VGA design	117	(3)
8.2.2 Evaluation	120	(4)
8.3 ADC design	124	(11)
8.3.1 Conventional solutions	124	(1)
8.3.2 ΣΔ ADC with integrated passive mixer	125	(6)
8.3.3 Evaluation	131	(4)
8.4 Evaluation of the channel	135	(2)
8.4.1 Discussion	135	(1)
8.4.2 Benchmark	136	(1)
8.5 Conclusions	137	(2)
9 Conditioning ΣΔ ADCs for Bluetooth	139	(52)
9.1 System	139	(3)
9.1.1 Conventional radio with analog demodulation	140	(1)
9.1.2 Radio with digital demodulation and analog signal-conditioning	141	(1)
9.1.3 Radio with digital demodulation, without analog signal-conditioning	g141
9.2 Feed forward ΣΔ ADC	142	(14)
9.2.1 Design	143	(7)
9.2.2 Evaluation	150	(6)
9.3 Conditioning feedback EA ADC	156	(14)
9.3.1 Design	157	(6)
9.3.2 Evaluation	163	(7)
9.4 FFB-ADC	170	(11)
9.4.1 Design	171	(5)
9.4.2 Evaluation	176	(5)
9.5 Evaluation of the channels	181	(7)
9.5.1 Benchmark with published ADCs	182	(1)
9.5.2 Comparison of the presented ADCs	182	(5)
9.5.3 Benchmark with published Bluetooth conditioning channels	187	(1)
9.6 Conclusions	188	(3)
10 General conclusions	191	(24)
A Overview of published ΣΔ ADCs	193	(6)
B Power/performance relation of analog circuits	199	(4)
B.1 Simple differential pair	199	(1)
B.2 Differential pair in a global feed-back configuration	200	(1)
B.3 Degenerated differential pair	201	(2)
C Power/performance relation of digital filters	203	(4)
C.1 Analysis of the filter topology	203	(1)
C.2 Calculation of filter parameters	204	(1)
C.3 Calculation of power consumption	205	(1)
C.4 Extension to other implementations	206	(1)
D Third-order distortion in analog circuits and ΣΔ ADCs	207	(4)
E Power consumption in a data interface	211	(4)
E.1 Analog data interface	211	(1)
E.2 Digital data interface	212	(3)
References	215