Analog Circuit Design

by Van Roermund, Arthur H. M.; Steyaert, Michiel; Huijsing, Johan H.

• ISBN13: 9781402075599
• ISBN10: 1402075596
• Format: Hardcover
• Copyright: 2003-09-01
• Publisher: Kluwer Academic Pub

Summary

This book contains the contribution of 18 tutorials of the 12th Workshop on Advances in Analog Circuit Design. It is number 12 in the successful series of Analog Circuit Design, providing valuable information and excellent overviews of analog circuit design, CAD, and RF systems. The series can be seen as a reference to those involved in analog and mixed-signal design. Each book discusses three specific topics on new and valuable design ideas in the area of analog circuit design. Each topic is discussed by six experts in the field and state-of-the-art information is shared and overviewed. In this 12th edition the topics are Fractional-N Synthesizers, Design for Robustness, and Line and Bus Drivers. Analog Circuit Design is an essential reference source for analog design engineers and researchers that wish to keep abreast with the latest developments in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

Table of Contents

Preface	vii
Part I: Fractional-N Synthesis
A. van Roermund	1	(26)
Practical Design Aspects in Franctional-N Frequency Synthesis Design and Simulation of Franctional-N Frequency Synthesizers
M. Perrott	27	(24)
Monolithic CMOS Fractional-N Frequency Synthesizer Design for High Spectral Purity
B. De Muer, M. Steyaert	51	(26)
A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesiser with 35Hz Frequency Step and Quantization Noise Compensation
I. Bietti, G. Albasini, E. Temporite, R. Castello	77	(20)
Implementation Aspects of Fractional-N Techniques in Cellular Handsets
Y. Le Guillou, D. Brunel	97	(14)
Fractional-N Phase Locked Loops and it's Application in the GSM System
G. Märzinger, B. Neurauter	111	(18)
Part II: Design for Robustness
M. Steyaert	129	(2)
ESD for Analogue Circuit Design
D. Clarke, A. Righter	131	(38)
ESD in Smart Power Processes
G. Croce, A. Andreini, L. Cerati, G. Meneghesso, L. Sponion	169	(38)
RF-ESD Co-Design for High Performance CMOS LNAs
P. Leroux, M. Steyaert	207	(20)
Improvement of System Robustness through EMC Optimazation
B. Deutschmann	227	(16)
Robustness in Analog Design
M. De Mey	243	(12)
Minimizing Undesired Coupling and Interaction in Mixed Signal ICs
T.J. Schmerbeck	255	(20)
Part III: Line and Bus Drivers J. Huijsing
Looking to/for Low Power ADSL Drivers in the DSLAM
E. Moons	275	(16)
Class-AB Low-Distortion Drivers for ADSL
T. Ferianz	291	(18)
Class D Self-Oscillating Line Drivers
T. Piessens, M. Steyaert	309	(24)
Class GIH Line Drivers for xDSL
J. Pierdomenico	333	(26)
The USB 2.0 Physical Layer: Standard and Implementation
G. den Besten	359	(20)
Backplane Transceivers
K. Tam, W. Ellersick, R. Soenneker	379