Architecture Design and Validation Methods

by Borger, Egon

• ISBN13: 9783540649762
• ISBN10: 354064976X
• Format: Hardcover
• Copyright: 2000-05-01
• Publisher: Springer Verlag

Summary

This state-of-the-art survey gives a systematic presentation of recent advances in the design and validation of computer architectures. Based on advanced research ideas and approaches, and written by eminent researchers in the field, seven chapters cover the whole range from computer aided high-level design of VLSI circuits and systems to layout and testable design, including modeling and synthesis of behavior, of control, and of dataflow, cell based logic optimization, machine assisted verification, and virtual machine design. The chapters presuppose only basic familiarity with computer architecture. They are self-contained and lead the reader gently and informatively to the forefront of current research. A special feature of the book is the comprehensive range of architecture design and validation topics covered, giving the reader a clear view of the problems and of advanced techniques for their solution.

Table of Contents

Modeling and Synthesis of Behavior, Control and Data Flow	1	(48)
Raul Camposano
Andrew Seawright
Joseph Buck
Introduction	1	(2)
Behavioral Synthesis	3	(12)
High-Level Control	15	(9)
Data Flow	24	(18)
Conclusion	42	(7)
References	42	(7)
Cell-based Logic Optimization	49	(40)
Giovanni De Micheli
Introduction	49	(1)
Problem Formulation and Analysis	49	(3)
Algorithms for Library Binding	52	(8)
Boolean Matching	60	(18)
Generalized Matching	78	(5)
Conclusion	83	(6)
References	84	(5)
A Design Flow for Performance Planning: New Paradigms for Iteration Free Synthesis	89	(52)
Ralph H.J.M. Otten
Introduction	89	(3)
Flow Components	92	(7)
Layout Synthesis	99	(2)
Placement Versus Floorplan Design	101	(14)
Global Wires	115	(7)
Wire Planning	122	(5)
Gate Sizing	127	(10)
Conclusions	137	(4)
References	138	(3)
Test and Testable Design	141	(50)
Hans-Joachim Wunderlich
Introduction	141	(2)
Defect Analysis and Fault Modeling	143	(12)
External Testing	155	(7)
Self-Testable Systems-On-Chip	162	(29)
References	185	(6)
Machine Assisted Verification	191	(52)
Hans Eveking
Introduction	191	(4)
Logic Verification	195	(12)
Bit-Vector and Word-Level Verification	207	(4)
Verification by Fixed-Point Calculations	211	(7)
Verification Techniques for Bounded State Sequences	218	(13)
Formally Correct Construction of Pipelined Systems	231	(12)
References	238	(5)
Models of Computation for System Design	243	(54)
Luciano Lavagno
Alberto Sangiovanni-Vincentelli
Ellen M. Sentovich
Introduction	243	(5)
MOCs: Basic Concepts and the Tagged Signal Model	248	(13)
Common Models of Computation	261	(15)
Codesign Finite State Machines	276	(13)
Conclusions	289	(8)
References	292	(5)
Modular Design for the Java Virtual Machine Architecture	297	(1)
Egon Borger
Wolfram Schulte
Introduction	297	(4)
The Trustful Virtual Machine	301	(12)
The Defensive Virtual Machine	313	(10)
The Diligent Virtual Machine	323	(11)
The Dynamic Virtual Machine	334	(10)
Related and Future Work	344	(2)
The JVM Abstract State Machine	346	(10)
References	356