Analog signal processing circuit blocks implemented in mixed-signal systems utilize more digital signal processing where the quality of the analog components can be reduced at the cost of digital system complexity. Discussing these design techniques from a circuit designer's point of view, CMOS is an advanced guide to mixed-signal circuit design that will bring designers rapidly up to speed. This new edition features additional examples and more, smaller chapters to make the information more accessible to graduate students as well as professionals who want to improve their skills in this area.

R. JACOB (JAKE) BAKER, PhD, is an engineer, educator, and inventor. He has more than twenty years of engineering experience and holds over 200 granted or pending patents in integrated circuit design. Jake is the author of several circuit design books. For a detailed biography, please visit: http://CMOSedu.com/jbaker/jbaker.htm.

Preface	p. XV
Signals, Filters, and Tools	p. 1
Sinusoidal Signals	p. 1
The Pendulum Analogy	p. 1
Describing Amplitude in the x-y Plane	p. 3
In-Phase and Quadrature Signals	p. 4
The Complex (z-) Plane	p. 6
Comb Filters	p. 8
The Digital Comb Filter	p. 11
The Digital Differentiator	p. 14
An Intuitive Discussion of the z-Plane	p. 15
Comb Filters with Multiple Delay Elements	p. 17
The Digital Integrator	p. 19
The Delaying Integrator	p. 20
An Important Note	p. 21
Representing Signals	p. 21
Exponential Fourier Series	p. 22
Fourier Transform	p. 23
Dirac Delta Function (Unit Impulse Response)	p. 23
Sampling and Aliasing	p. 27
Sampling	p. 28
Impulse Sampling	p. 28
A Note Concerning the AAF and the RCF	p. 30
Time Domain Description of Reconstruction	p. 31
An Important Note	p. 33
Decimation	p. 33
The Sample-and-Hold (S/H)	p. 35
S/H Spectral Response	p. 35
The Reconstruction Filter (RCF)	p. 39
Circuit Concerns for Implementing the S/H	p. 39
An Example	p. 40
The Track-and-Hold (T/H)	p. 41
Interpolation	p. 43
Zero Padding	p. 44
Hold Register	p. 46
Linear Interpolation	p. 49
K-Path Sampling	p. 50
Switched-Capacitor Circuits	p. 51
Non-Overlapping Clock Generation	p. 53
Circuits	p. 54
Implementing the S/H	p. 54
Finite Op-Amp Gain-Bandwidth Product	p. 55
Autozeroing	p. 57
Correlated Double Sampling (CDS)	p. 59
Selecting Capacitor Sizes	p. 61
The S/H with Gain	p. 61
Implementing Subtraction in the S/H	p. 63
A Single-Ended to Differential Output S/H	p. 65
The Discrete Analog Integrator (DAI)	p. 66
A Note Concerning Block Diagrams	p. 68
Fully-Differential DAI	p. 69
DAI Noise Performance	p. 70
Analog Filters	p. 73
Integrator Building Blocks	p. 73
Lowpass Filters	p. 73
Active-RC Integrators	p. 75
Effects of Finite Op-Amp Gain Bandwidth Product, f[subscript un]	p. 78
Active-RC SNR	p. 82
MOSFET-C Integrators	p. 83
Why Use an Active Circuit (an Op-Amp)?	p. 85
g[subscript m]-C (Transconductor-C) Integrators	p. 86
Common-Mode Feedback Considerations	p. 88
A High-Frequency Transconductor	p. 89
Discrete-Time Integrators	p. 90
An Important Note	p. 94
Exact Frequency Response of an Ideal Discrete-Time Filter	p. 94
Filtering Topologies	p. 95
The Bilinear Transfer Function	p. 95
Active-RC Implementation	p. 97
Transconductor-C Implementation	p. 97
Switched-Capacitor Implementation	p. 98
The Biquadratic Transfer Function	p. 99
Active-RC Implementation	p. 101
Switched-Capacitor Implementation	p. 106
High Q	p. 107
Q Peaking and Instability	p. 112
Transconductor-C Implementation	p. 114
Digital Filters	p. 119
SPICE Models for DACs and ADCs	p. 119
The Ideal DAC	p. 119
SPICE Modeling the Ideal DAC	p. 120
The Ideal ADC	p. 121
Number Representation	p. 123
Increasing Word Size (Extending the Sign-Bit)	p. 124
Adding Numbers and Overflow	p. 125
Subtracting Numbers in Two's Complement Format	p. 126
Sinc-Shaped Digital Filters	p. 126
The Counter	p. 126
Aliasing	p. 127
The Accumulate-and-Dump	p. 129
Lowpass Sinc Filters	p. 129
Averaging without Decimation: A Review	p. 132
Cascading Sinc Filters	p. 132
Finite and Infinite Impulse Response Filters	p. 133
Bandpass and Highpass Sinc Filters	p. 134
Canceling Zeroes to Create Highpass and Bandpass Filters	p. 134
Frequency Sampling Filters	p. 138
Interpolation using Sinc Filters	p. 139
Additional Control	p. 142
Cascade of Integrators and Combs	p. 142
Decimation using Sinc Filters	p. 143
Filtering Topologies	p. 145
FIR Filters	p. 145
Stability and Overflow	p. 146
Overflow	p. 147
The Bilinear Transfer Function	p. 148
The Canonic Form (or Standard Form) of a Digital Filter	p. 151
General Canonic Form of a Recursive Filter	p. 154
The Biquadratic Transfer Function	p. 155
Comparing Biquads to Sinc-Shaped Filters	p. 157
A Comment Concerning Multiplications	p. 158
Data Converter SNR	p. 163
Quantization Noise	p. 163
Viewing the Quantization Noise Spectrum Using Simulations	p. 164
Bennett's Criteria	p. 165
An Important Note	p. 166
RMS Quantization Noise Voltage	p. 166
Treating Quantization Noise as a Random Variable	p. 168
Quantization Noise Voltage Spectral Density	p. 169
Calculating Quantization Noise from a SPICE Spectrum	p. 171
Power Spectral Density	p. 172
Signal-to-Noise Ratio (SNR)	p. 173
Effective Number of Bits	p. 173
Coherent Sampling	p. 175
Signal-to-Noise Plus Distortion Ratio	p. 176
Spurious Free Dynamic Range	p. 177
Dynamic Range	p. 177
Specifying SNR and SNDR	p. 178
Clock Jitter	p. 178
Using Oversampling to Reduce Sampling Clock Jitter Stability Requirements	p. 181
A Practical Note	p. 182
A Tool: The Spectral Density	p. 182
The Spectral Density of Deterministic Signals: An Overview	p. 183
The Spectral Density of Random Signals: An Overview	p. 185
Specifying Phase Noise from Measured Data	p. 189
Improving SNR using Averaging	p. 190
An Important Note	p. 191
Using Averaging to Improve SNR	p. 192
Ideal Signal-to-Noise Ratio	p. 194
Linearity Requirements	p. 194
Adding a Noise Dither	p. 195
Jitter	p. 198
Anti-Aliasing Filter	p. 198
Using Feedback to Improve SNR	p. 199
Data Converter Design Basics	p. 203
The One-Bit ADC and DAC	p. 204
Passive Noise-Shaping	p. 205
Signal-to-Noise Ratio	p. 208
Decimating and Filtering the Modulator's Output	p. 209
SNR Calculation using a Sinc Filter	p. 211
Offset, Matching, and Linearity	p. 212
Resistor Mismatch	p. 213
The Feedback DAC	p. 213
DAC Offset	p. 214
Linearity of the First-Order Modulator	p. 214
Dead Zones	p. 215
Improving SNR and Linearity	p. 215
Second-Order Passive Noise-Shaping	p. 216
Passive Noise-Shaping Using Switched-Capacitors	p. 218
Increasing SNR using K-Paths	p. 220
Revisiting Switched-Capacitor Implementations	p. 224
Effects of the Added Amplifier on Linearity	p. 224
Improving Linearity Using an Active Circuit	p. 225
Second-Order Noise-Shaping	p. 227
Signal-to-Noise Ratio	p. 229
Discussion	p. 230
Noise-Shaping Data Converters	p. 233
First-Order Noise Shaping	p. 233
A Digital First-Order NS Demodulator	p. 235
Modulation Noise in First-Order NS Modulators	p. 236
RMS Quantization Noise in a First-Order Modulator	p. 237
Decimating and Filtering the Output of a NS Modulator	p. 239
Pattern Noise from DC Inputs (Limit Cycle Oscillations)	p. 241
Integrator and Forward Modulator Gain	p. 243
Comparator Gain, Offset, Noise, and Hysteresis	p. 246
Op-Amp Gain (Integrator Leakage)	p. 247
Op-Amp Settling Time	p. 248
Op-Amp Offset	p. 250
Op-Amp Input-Referred Noise	p. 250
Practical Implementation of the First-Order NS Modulator	p. 251
Second-Order Noise-Shaping	p. 253
Second-Order Modulator Topology	p. 253
Integrator Gain	p. 257
Implementing Feedback Gains in the DAI	p. 260
Using Two Delaying Integrators to Implement the Second-Order Modulator	p. 263
Selecting Modulator (Integrator) Gains	p. 264
Noise-Shaping Topologies	p. 264
Higher-Order Modulators	p. 265
M[superscript th]-Order Modulator Topology	p. 265
Filtering the Output of an M[superscript th]-Order NS Modulator	p. 266
Implementing Higher-Order, Single-Stage Modulators	p. 267
Multi-Bit Modulators	p. 269
Simulating a Multibit NS Modulator Using SPICE	p. 269
Error Feedback	p. 271
Implementation Concerns	p. 274
Cascaded Modulators	p. 275
Second-Order (1-1) Modulators	p. 275
Third-Order (1-1-1) Modulators	p. 277
Third-Order (2-1) Modulators	p. 277
Implementing the Additional Summing Input	p. 279
Bandpass Data Converters	p. 285
Continuous-Time Bandpass Noise-Shaping	p. 287
Passive-Component Bandpass Modulators	p. 287
An Important Note	p. 289
Active-Component Bandpass Modulators	p. 289
Signal-to-Noise Ratio	p. 290
Modulators for Conversion at Radio Frequencies	p. 291
Switched-Capacitor Bandpass Noise-Shaping	p. 292
Switched-Capacitor Resonators	p. 292
Second-Order Modulators	p. 294
Fourth-Order Modulators	p. 296
A Common Error	p. 297
A Comment about 1/f Noise	p. 297
Digital I/Q Extraction to Baseband	p. 297
A High-Speed Data Converter	p. 301
The Topology	p. 301
Clock Signals	p. 301
Path Settling Time	p. 302
Implementation	p. 303
Filtering	p. 306
Examples	p. 307
Direction	p. 312
Discussion	p. 312
Understanding the Clock Signals	p. 315
Practical Implementation	p. 316
Generating the Clock Signals	p. 316
The Components	p. 318
The Switched-Capacitors	p. 318
The Amplifier	p. 318
The Clocked Comparator	p. 319
The ADC	p. 320
Conclusion	p. 322
Index	p. 325
Table of Contents provided by Ingram. All Rights Reserved.

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