Compilers and Operating Systems for Low Power

by Benini, Luca; Kandemir, Mahmut; Ramanujam, J.

• ISBN13: 9781402075735
• ISBN10: 1402075731
• Format: Hardcover
• Copyright: 2003-10-01
• Publisher: Kluwer Academic Pub

Summary

Compilers and Operating Systems for Low Power focuses on both application-level compiler directed energy optimization and low-power operating systems. Chapters have been written exclusively for this volume by several of the leading researchers and application developers active in the field. The first six chapters focus on low energy operating systems, or more in general, energy-aware middleware services. The next five chapters are centered on compilation and code optimization. Finally, the last chapter takes a more general viewpoint on mobile computing. The material demonstrates the state-of-the-art work and proves that to obtain the best energy/performance characteristics, compilers, system software, and architecture must work together. The relationship between energy-aware middleware and wireless microsensors, mobile computing and other wireless applications are covered. This work will be of interest to researchers in the areas of low-power computing, embedded systems, compiler optimizations, and operating systems.

Table of Contents

List of Figures	xi
List of Tables	xv
Contributing Authors	xvii
Preface	xix
Low Power Operating System for Heterogeneous Wireless Communication System	1	(16)
Suet-Fei Li
Roy Sutton
Jan Rabaey
Introduction	2	(1)
Event-driven versus General-purpose OS	3	(9)
PicoRadio II Protocol Design	3	(1)
General-purpose Multi-tasking OS	4	(4)
Event-driven OS	8	(1)
Comparison Summary	9	(3)
Low Power Reactive OS for Heterogeneous Architectures	12	(3)
Event-driven Global Scheduler and Power Management	12	(2)
TinyOS Limitations and Proposed Extensions	14	(1)
Conclusion and Future Work	15	(2)
References	16	(1)
A Modified Dual-Priority Scheduling Algorithm for Hard Real-Time Systems to Improve Energy Savings	17	(20)
M. Angels Moncusi
Alex Arenas
Jesus Labarta
Introduction	17	(2)
Dual-Priority Scheduling	19	(2)
Power-Low Modified Dual-Priority Scheduling	21	(7)
Experimental Results	28	(8)
Summary	36	(1)
References	36	(1)
Toward the Placement of Power Management Points in Real-Time Applications	37	(16)
Nevine AbouGhazaleh
Daniel Mosse
Bruce Childers
Rami Melhem
Introduction	37	(2)
Model	39	(1)
Sources of Overhead	40	(1)
Computing the New Speed	40	(1)
Setting the New Speed	40	(1)
Speed Adjustment Schemes	41	(3)
Proportional Dynamic Power Management	41	(1)
Dynamic Greedy Power Management	42	(1)
Evaluation of Power Management Schemes	43	(1)
Optimal Number of PMPs	44	(4)
Evaluation of the Analytical Model	45	(3)
Conclusion	48	(5)
Appendix: Derivation of Formulas	48	(3)
References	51	(2)
Energy Characterization of Embedded Real-Time Operating Systems	53	(22)
Andrea Acquaviva
Luca Benini
Bruno Ricco
Introduction	53	(2)
Related Work	55	(1)
System Overview	56	(3)
The Hardware Platform	56	(1)
RTOS overview	57	(2)
Characterization Strategy	59	(1)
RTOS Characterization Results	60	(6)
Kernel Services	60	(2)
I/O Drivers	62	(1)
Burstiness Test	62	(1)
Clock Speed Test	63	(1)
Resource Contention Test	64	(1)
Application Example: RTOS vs Stand-alone	65	(1)
Cache Related Effects in Thread Switching	66	(1)
Summary of Findings	66	(1)
Conclusions	67	(8)
References	72	(3)
Dynamic Cluster Reconfiguration for Power and Performance	75	(20)
Eduardo Pinheiro
Ricardo Bianchini
Enrique V. Carrera
Taliver Heath
Motivation	77	(1)
Cluster Configuration and Load Distribution	78	(5)
Overview	78	(3)
Implementations	81	(2)
Methodology	83	(1)
Experimental Results	84	(5)
Related Work	89	(2)
Conclusions	91	(4)
References	91	(4)
Energy Management of Virtual Memory on Diskless Devices	95	(20)
Jerry Hom
Ulrich Kremer
Introduction	96	(1)
Related Work	97	(1)
Problem Formulation	98	(2)
EELRM Prototype Compiler	100	(5)
Phase 1 - Analysis	100	(1)
Phase 2 - Code Generation	101	(1)
Performance Model	102	(1)
Example	102	(1)
Implementation Issues	103	(2)
Experiments	105	(5)
Benchmark Characteristics	106	(1)
Simulation Results	107	(3)
Future Work	110	(1)
Conclusion	111	(4)
References	111	(4)
Propagating Constants Past Software to Hardware Peripherals on Fixed-Application Embedded Systems	115	(22)
Greg Stitt
Frank Vahid
Introduction	116	(3)
Example	119	(1)
Parameters in Cores	120	(3)
Propagating Constants from Software to Hardware	123	(2)
Experiments	125	(8)
8255A Programmable Peripheral Interface	126	(1)
8237A DMA Controller	127	(1)
PC16550A UART	128	(1)
Free-DCT-L Core	128	(3)
Results	131	(2)
Future Work	133	(1)
Conclusions	134	(3)
References	134	(3)
Constructive Timing Violation for Improving Energy Efficiency	137	(18)
Toshinori Sato
Itsujiro Arita
Introduction	137	(2)
Low Power via Fault-Tolerance	139	(4)
Evaluation Methodology	143	(1)
Simulation Results	143	(4)
Related Work	147	(4)
Conclusion and Future Work	151	(4)
References	151	(4)
Power Modeling and Reduction of VLIW Processors	155	(18)
Weiping Liao
Lei He
Introduction	155	(1)
Cycle-Accurate Vliw Power Simulation	156	(3)
Impact Architecture Framework	156	(1)
Power Models	157	(1)
PowerImpact	158	(1)
Clock Ramping	159	(6)
Clock Ramping with Hardware Prescan (CRHP)	160	(2)
Clock Ramping with Compiler-based Prediction (CRCP)	162	(1)
Basic CRCP Algorithm	162	(2)
Reduction of Redundant Ramp-up Instructions	164	(1)
Control Flow	165	(1)
Load Instructions	165	(1)
Experimental Results	165	(4)
Conclusions and Discussion	169	(4)
References	170	(3)
Low-Power Design of Turbo Decoder with Exploration of Energy-Throughput Trade-off	173	(20)
Arnout Vandecappelle
Bruno Bougard
K.C. Shashidhar
Francky Catthoor
Introduction	173	(3)
Data Transfer and Storage Exploration Methodology	176	(2)
Global Data Flow and Loop Transformations	178	(2)
Removal of Interleaver Memory	178	(1)
Enabling Parallelism	179	(1)
Storage Cycle Budget Distribution	180	(6)
Memory Hierarchy Layer Assignment	181	(1)
Data Restructuring	182	(1)
Loop Transformations for Parallelization	183	(1)
Loop Merging	183	(1)
Loop Pipelining	184	(1)
Partial Loop Unrolling	184	(1)
Loop Transformation Results	185	(1)
Storage Bandwidth Optimization	185	(1)
Memory Organization	186	(4)
Memory Organization Exploration	186	(2)
Memory Organization Decision	188	(2)
Conclusions	190	(3)
References	190	(3)
Static Analysis of Parameterized Loop Nests for Energy Efficient Use of Data Caches	193	(16)
Paolo D'Alberto
Alexandru Nicolau
Alexander Veidenbaum
Rajesh Gupta
Introduction	193	(2)
Energy and Line Size	195	(1)
Background	195	(2)
The Parameterized Loop Analysis	197	(3)
Reduction to Single Reference Interference	199	(1)
Interference and Reuse Trade-off	200	(1)
Stamina Implementation Results	200	(3)
Swim from SPEC 2000	201	(1)
Self Interference	201	(1)
Tiling and Matrix Multiply	202	(1)
Summary and Future Work	203	(6)
References	203	(6)
A Fresh Look at Low-Power Mobile Computing	209	(12)
Michael Franz
Introduction	209	(2)
Architecture	211	(1)
Handover and the Quantization of Computational Resources	212	(3)
Standardization of Execution Environment's Parameters	214	(1)
A Commercial Vision: Impact on Billing, Customer Loyalty and Churn	215	(1)
Segmentation of Functionality: The XU-MS Split	215	(3)
Use of Field-Programmable Hardware in the Mobile Station	217	(1)
Special End-To-End Application Requirements	217	(1)
Status and Research Vision	218	(3)
References	219	(2)
Index	221