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9780130351197

Computer Organization and Architecture : Designing for Performance

by
  • ISBN13:

    9780130351197

  • ISBN10:

    0130351199

  • Edition: 6th
  • Format: Hardcover
  • Copyright: 2003-01-01
  • Publisher: PRENTICE HALL
  • View Upgraded Edition

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Summary

With up-to-date coverage of modern architectural approaches, this handbook provides a thorough discussion of the fundamentals of computer organization and architecture, as well as the critical role of performance in driving computer design. Captures the field's continued innovations and improvements, with input from active practitioners. Reviews the two most prevalent approaches: superscalar, which has come to dominate the microprocessor design field, including the widely used Pentium; and EPIC, seen in the IA-64 architecture of Intel' s Itanium. Views systems from both the architectural and organizational perspectives. Includes coverage of critical topics, such as bus organization, computer arithmetic, I/O modules, RISC, memory, and parallel processors. For professionals in computer product marketing or information system configuration and maintenance.

Author Biography

WILLIAM STALLINGS has made a unique contribution to understanding the broad sweep of technical developments in computer networking and computer architecture. He has authored 17 titles, plus revised editions, for a total of 37 books on various aspects of these subjects. He has three times received the award for best Computer Science Textbook of the Year from the Text and Academic Authors Association (Computer Organization and Architecture, Prentice Hall, 1996; Data and Computer Communications, Prentice Hall, 1997; Operating Systems, Prentice Hall, 1998). In over 20 years in the field, Dr. Stallings has been a technical contributor, technical manager and an executive with several high-technology firms. Currently he is an independent consultant whose clients have included computer and networking manufacturers and customers, software development firms and leading-edge government research institutions. Dr. Stallings is a frequent lecturer and a regular contributor to technical journals and trade publications. Dr. Stallings holds a Ph.D. from MIT in computer science and a B.S. from Notre Dame in electrical engineering.

Table of Contents

Web Site for Computer Organization and Architecture, Sixth Edition vi
Preface xv
About the Author xxi
PART ONE OVERVIEW 1(46)
Introduction
3(12)
Organization and Architecture
4(1)
Structure and Function
5(5)
Why Study Computer Organization and Architecture?
10(3)
Outline of the, Book
13(1)
Internet and Web Resources
13(2)
Computer Evolution and Performance
15(32)
A Brief History of Computers
16(21)
Designing for Performance
37(4)
Pentium and PowerPC Evolution
41(3)
Recommended Reading and Web Sites
44(1)
Key Terms, Review Questions, and Problems
45(2)
PART TWO THE COMPUTER SYSTEM 47(234)
A Top-level View of Computer Function and Interconnection
49(46)
Computer Components
50(3)
Computer Function
53(14)
Interconnection Structures
67(2)
Bus Interconnection
69(10)
PCI
79(10)
Recommended Reading and Web Sites
89(1)
Key Terms Review Questions, and Problems
90(5)
Appendix 3A: Timing Diagrams
92(3)
Cache Memory
95(42)
Computer Memory System Overview
96(7)
Cache Memory Principles
103(3)
Pentium 4 and PowerPC Cache Organizations
106(15)
Pentium 4 and PowerPC Cache Organizations
121(4)
Recommended Reading
125(1)
Key Terms, Review Questions, and Problems
125(12)
Appendix 4A: Performance Characteristics of Two-Level Memories
128(9)
Internal Memory
137(26)
Semiconductor Main Memory
138(10)
Error Correction
148(6)
Advanced DRAM Organization
154(5)
Recommended Reading and Web Sites
159(1)
Key Terms, Review Questions, and Problems
160(3)
External Memory
163(32)
Magnetic Disk
164(10)
RAID
174(10)
Optical Memory
184(5)
Magnetic Tape
189(2)
Recommended Reading and Web Sites
191(1)
Key Terms, Review Questions, and Problems
192(3)
Input/Output
195(42)
External Devices
197(4)
I/O Modules
201(3)
Programmed I/O
204(4)
Interrupt-Driven I/O
208(8)
Direct Memory Access
216(4)
I/O Channels and Processors
220(3)
The External Interface: Fire Wire and InfiniBand
223(10)
Recommended Reading and Web Sites
233(1)
Key Terms, Review Questions, and Problems
233(4)
Operating System Support
237(44)
Operating System Overview
238(12)
Scheduling
250(6)
Memory Management
256(13)
Pentium II and PowerPC Memory Management
269(8)
Recommended Reading and Web Sites
277(1)
Key Terms, Review Questions, and Problems
278(3)
PART THREE THE CENTRAL PROCESSING UNIT 281(292)
Computer Arithmetic
283(46)
The Arithmetic and Logic Unit
284(1)
Integer Representation
285(6)
Integer Arithmetic
291(16)
Floating-Point Representation
307(6)
Floating-Point Arithmetic
313(11)
Recommended Reading and Web Sites
324(1)
Key Terms, Review Questions, and Problems
325(4)
Instruction Sets: Characteristics and Functions
329(52)
Machine Instruction Characteristics
330(7)
Types of Operands
337(2)
Pentium and PowerPC Data Types
339(2)
Types of Operations
341(14)
Pentium and PowerPC Operation Types
355(9)
Assembly Language
364(2)
Recommended Reading
366(1)
Key Terms, Review Questions, and Problems
367(14)
Appendix 10A: Stacks
371(5)
Appendix 10B: Little-, Big-, and Bi-Endian
376(5)
Instruction Sets: Addressing Modes and Formats
381(30)
Addressing
382(7)
Pentium and PowerPC Addressing Modes
389(6)
Instruction Formats
395(9)
Pentium and PowerPC Instruction Formats
404(4)
Recommended Reading
408(1)
Key Terms, Review Questions, and Problems
409(2)
CPU Structure and Function
411(50)
Processor Organization
412(2)
Register Organization
414(6)
Instruction Cycle
420(4)
Instruction Pipelining
424(16)
The Pentium Processor
440(10)
The PowerPC Processor
450(7)
Recommended Reading
457(1)
Key Terms, Review Questions, and Problems
458(3)
Reduced Instruction Set Computers
461(44)
Instruction Execution Characteristics
463(4)
The Use of a Large Register File
467(6)
Compiler-Based Register Optimization
473(1)
Reduced Instruction Set Architecture
474(8)
RISC Pipelining
482(4)
MIPS R4000
486(8)
SPARC
494(6)
RISC versus CISC Controversy
500(1)
Recommended Reading
501(1)
Key Terms, Review Questions, and Problems
502(3)
Instruction-Level Parallelism and Superscalar Processors
505(36)
Overview
507(4)
Design Issues
511(9)
Pentium 4
520(7)
PowerPC
527(8)
Recommended Reading
535(1)
Key Terms, Review Questions, and Problems
536(5)
The IA-64 Architecture
541(32)
Motivation
543(1)
General Organization
544(2)
Predication, Speculation, and Software Pipelining
546(17)
IA-64 Instruction Set Architecture
563(5)
Itanium Organization
568(1)
Recommended Reading and Web Sites
569(1)
Key Terms, Review Questions, and Problems
570(3)
PART FOUR THE CONTROL UNIT 573(68)
Control Unit Operation
575(24)
Micro-Operations
577(6)
Control of the Processor
583(11)
Hardwired Implementation
594(3)
Recommended Reading
597(1)
Key Terms, Review Questions, and Problems
597(2)
Microprogrammed Control
599(42)
Basic Concepts
600(9)
Microinstruction Sequencing
609(6)
Microinstruction Execution
615(12)
TI 8800
627(10)
Applications of Microprogramming
637(1)
Recommended Reading
638(1)
Key Terms, Review Questions, and Problems
639(2)
PART FIVE PARALLEL ORGANIZATION 641(104)
Parallel Processing
643(102)
Multiple Processor Organizations
645(2)
Symmetric Multiprocessors
647(9)
Cache Coherence and the MESI Protocol
656(7)
Clusters
663(7)
Nonuniform Memory Access
670(4)
Vector Computation
674(13)
Recommended Reading
687(1)
Key Terms, Review Questions, and Problems
688(5)
APPENDICES
Appendix A Digital Logic
693(40)
A.1 Boolean Algebra
694(2)
A.2 Gates
696(3)
A.3 Combinational Circuits
699(21)
A.4 Sequential Circuits
720(10)
A.5 Problems
730(3)
Appendix B Number Systems
733(8)
B.1 The Decimal System
734(1)
B.2 The Binary System
734(1)
B.3 Converting between Binary and Decimal
735(3)
B.4 Hexadecimal Notation
738(1)
B.5 Problems
739(2)
Appendix C Projects for Teaching Computer Organization and Architecture
741(4)
C.1 Research Projects
742(1)
C.2 Simulation Projects
742(1)
C.3 Reading/Report Assignments
743(2)
Glossary 745(12)
References 757(16)
Index 773

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