Digital Electronics : A Practical Approach

by Kleitz, William

• ISBN13: 9780131141650
• ISBN10: 0131141651
• Edition: 8th
• Format: Hardcover
• Copyright: 2008-01-01
• Publisher: Prentice Hall

Summary

This easy-to-understand book illustrates practical applications using circuits the user will face in the design engineer field. Electronics Workbench CD-ROM included contains Electronics Workbench Version 5 and EWB Multisim Version 6 circuit data files, as well as solutions to the in-text Altera and Xilinx examples-providing users with additional reinforcement and feedback concerning exercises and problems. Programmable Logic Devices (CPLDs); Timing waveforms; MultiSIM simulations of digital circuit applications; Computer generated Boolean logic reductions; Section on event counting with optical switches and Hall-effect switches; Section on connecting multiple I/O to CPLDs; Stepper motors and controller ICs; Section on implementing state machines using VHDL; and ADC and DAC simulations. For design engineers.

Table of Contents

Number Systems and Codes	2	(26)
Outline	2	(1)
Objectives	2	(1)
Introduction	3	(1)
Digital versus Analog	3	(1)
Digital Representations of Analog Quantities	3	(3)
Decimal Numbering System (Base 10)	6	(1)
Binary Numbering System (Base 2)	7	(2)
Decimal-to-Binary Conversion	9	(2)
Octal Numbering System (Base 8)	11	(1)
Octal Conversions	11	(2)
Hexadecimal Numbering System (Base 16)	13	(1)
Hexadecimal Conversions	14	(2)
Binary-Coded-Decimal System	16	(1)
Comparison of Numbering Systems	16	(1)
The ASCII Code	17	(2)
Applications of the Numbering Systems	19	(9)
Summary	22	(1)
Glossary	22	(1)
Problems	23	(1)
Schematic Interpretation Problems	24	(1)
Electronics Workbench®/MultiSIM® Exercises	25	(1)
Answers to Review Questions	26	(2)
Digital Electronic Signals and Switches	28	(32)
Outline	28	(1)
Objectives	28	(1)
Introduction	29	(1)
Digital Signals	29	(1)
Clock Waveform Timing	29	(2)
Serial Representation	31	(1)
Parallel Representation	32	(3)
Switches in Electronic Circuits	35	(1)
A Relay as a Switch	36	(3)
A Diode as a Switch	39	(3)
A Transistor as a Switch	42	(4)
The TTL Integrated Circuit	46	(3)
MultiSIM Simulation of Switching Circuits	49	(2)
The CMOS Integrated Circuit	51	(1)
Surface-Mount Devices	51	(9)
Summary	53	(1)
Glossary	53	(2)
Problems	55	(2)
Schematic Interpretation Problems	57	(1)
Electronics Workbench®/MultiSIM® Exercises	58	(1)
Answers to Review Questions	59	(1)
Basic Logic Gates	60	(48)
Outline	60	(1)
Objectives	60	(1)
Introduction	61	(1)
The AND Gate	61	(2)
The OR Gate	63	(2)
Timing Analysis	65	(3)
Enable and Disable Functions	68	(2)
Using IC Logic Gates	70	(1)
Introduction to Troubleshooting Techniques	71	(5)
The Inverter	76	(1)
The NAND Gate	77	(2)
The NOR Gate	79	(2)
Logic Gate Waveform Generation	81	(7)
Using IC Logic Gates	88	(2)
Summary of the Basic Logic Gates and IEEE/IEC Standard Logic Symbols	90	(18)
Summary	92	(1)
Glossary	93	(1)
Problems	94	(10)
Schematic Interpretation Problems	104	(1)
Electronics Workbench®/MultiSIM® Exercises	105	(2)
Answers to Review Questions	107	(1)
Programmable Logic Devices: Altera and Xilinx CPLDs and FPGAs	108	(20)
Outline	108	(1)
Objectives	108	(1)
Introduction	108	(1)
PLD Design Flow	109	(3)
PLD Architecture	112	(4)
Using PLDs to Solve Basic Logic Designs	116	(12)
Summary	124	(1)
Glossary	124	(1)
Problems	125	(2)
CPLD Problems	127	(1)
Boolean Algebra and Reduction Techniques	128	(66)
Outline	128	(1)
Objectives	128	(1)
Introduction	129	(1)
Combinational Logic	129	(2)
Boolean Algebra Laws and Rules	131	(5)
Simplification of Combinational Logic Circuits Using Boolean Algebra	136	(6)
De Morgan's Theorem	142	(12)
The Universal Capability of NAND and NOR Gates	154	(5)
AND-OR-INVERT Gates for Implementing Sum-of-Products Expressions	159	(4)
Karnaugh Mapping	163	(6)
System Design Applications	169	(3)
CPLD Design Applications	172	(22)
Summary	176	(1)
Glossary	176	(1)
Problems	177	(11)
Schematic Interpretation Problems	188	(1)
Electronics Workbench®/MultiSIM® Exercises	189	(2)
CPLD Problems	191	(2)
Answers to Review Questions	193	(1)
Exclusive-OR and Exclusive-NOR Gates	194	(22)
Outline	194	(1)
Objectives	194	(1)
Introduction	194	(1)
The Exclusive-OR Gate	195	(1)
The Exclusive-NOR Gate	196	(3)
Parity Generator/Checker	199	(3)
System Design Applications	202	(4)
CPLD Design Applications	206	(10)
Summary	209	(1)
Glossary	209	(1)
Problems	209	(3)
Schematic Interpretation Problems	212	(1)
Electronics Workbench®/MultiSIM® Exercises	213	(1)
CPLD Problems	214	(1)
Answers to Review Questions	215	(1)
Arithmetic Operations and Circuits	216	(42)
Outline	216	(1)
Objectives	216	(1)
Introduction	216	(1)
Binary Arithmetic	217	(6)
Two's-Complement Representation	223	(3)
Two's-Complement Arithmetic	226	(1)
Hexadecimal Arithmetic	227	(3)
BCD Arithmetic	230	(2)
Arithmetic Circuits	232	(4)
Four-Bit Full-Adder ICs	236	(3)
System Design Applications	239	(4)
Arithmetic/Logic Units	243	(3)
CPLD Design Applications	246	(12)
Summary	249	(1)
Glossary	249	(2)
Problems	251	(4)
Schematic Interpretation Problems	255	(1)
Electronics Workbench®/MultiSIM® Exercises	255	(1)
CPLD Problems	256	(1)
Answers to Review Questions	257	(1)
Code Converters, Multiplexers, and Demultiplexers	258	(58)
Outline	258	(1)
Objectives	258	(1)
Introduction	258	(1)
Comparators	259	(2)
Decoding	261	(8)
Encoding	269	(6)
Code Converters	275	(8)
Multiplexers	283	(6)
Demultiplexers	289	(4)
System Design Applications	293	(6)
CPLD Design Applications	299	(17)
Summary	302	(1)
Glossary	302	(1)
Problems	303	(7)
Schematic Interpretation Problems	310	(1)
Electronics Workbench®/MultiSIM® Exercises	310	(3)
CPLD Problems	313	(1)
Answers to Review Questions	314	(2)
Logic Families and Their Characteristics	316	(44)
Outline	316	(1)
Objectives	316	(1)
Introduction	316	(1)
The TTL Family	317	(3)
TTL Voltage and Current Ratings	320	(9)
Other TTL Considerations	329	(5)
Improved TTL Series	334	(2)
The CMOS Family	336	(5)
Emitter-Coupled Logic	341	(2)
Comparing Logic Families	343	(1)
Interfacing Logic Families	344	(16)
Summary	351	(1)
Glossary	352	(1)
Problems	353	(4)
Schematic Interpretation Problems	357	(1)
Electronics Workbench®/MultiSIM® Exercises	358	(1)
Answers to Review Questions	358	(2)
Flip-Flops and Registers	360	(44)
Outline	360	(1)
Objectives	360	(1)
Introduction	360	(1)
S-R Flip-Flop	361	(4)
Gated S-R Flip-Flop	365	(2)
Gated D Flip-Flop	367	(1)
Integrated-Circuit D Latch (7475)	367	(2)
Integrated-Circuit D Flip-Flop (7474)	369	(5)
Master--Slave J-K Flip-Flop	374	(4)
Edge-Triggered J-K Flip-Flop	378	(2)
Integrated-Circuit J-K Flip-Flop (7476, 74LS76)	380	(9)
Using an Octal D Flip-Flop in a Microcontroller Application	389	(15)
Summary	391	(1)
Glossary	391	(2)
Problems	393	(7)
Schematic Interpretation Problems	400	(1)
Electronics Workbench®/MultiSIM® Exercises	401	(1)
CPLD Problems	402	(1)
Answers to Review Questions	403	(1)
Practical Considerations for Digital Design	404	(48)
Outline	404	(1)
Objectives	404	(1)
Introduction	404	(1)
Flip-Flop Time Parameters	405	(15)
Automatic Reset	420	(2)
Schmitt Trigger ICs	422	(6)
Switch Debouncing	428	(3)
Sizing Pull-Up Resistors	431	(1)
Practical Input and Output Considerations	432	(20)
Summary	442	(1)
Glossary	443	(1)
Problems	444	(5)
Schematic Interpretation Problems	449	(1)
Electronics Workbench®/MultiSIM® Exercises	450	(1)
Answers to Review Questions	450	(2)
Counter Circuits and VHDL State Machines	452	(80)
Outline	452	(1)
Objectives	452	(1)
Introduction	452	(1)
Analysis of Sequential Circuits	453	(4)
Ripple Counters	457	(6)
Design of Divide-by-N Counters	463	(8)
Ripple Counter ICs	471	(6)
System Design Applications	477	(6)
Seven-Segment LED Display Decoders	483	(8)
Synchronous Counters	491	(4)
Synchronous Up/Down-Counter ICs	495	(8)
Applications of Synchronous Counter ICs	503	(4)
CPLD Design Applications	507	(1)
Implementing State Machines in VHDL	508	(24)
Summary	520	(1)
Glossary	521	(1)
Problems	522	(6)
Schematic Interpretation Problems	528	(1)
Electronics Workbench®/MultiSIM® Exercises	528	(1)
CPLD Problems	529	(1)
Answers to Review Questions	530	(2)
Shift Registers	532	(48)
Outline	532	(1)
Objectives	532	(1)
Introduction	532	(1)
Shift Register Basics	533	(2)
Parallel-to-Serial Conversion	535	(1)
Recirculating Register	535	(3)
Serial-to-Parallel Conversion	538	(1)
Ring Shift Counter and Johnson Shift Counter	539	(3)
Shift Register ICs	542	(10)
System Design Applications for Shift Registers	552	(4)
Driving a Stepper Motor with a Shift Register	556	(6)
Three-State Buffers, Latches, and Transceivers	562	(5)
CPLD Design Applications	567	(13)
Summary	568	(1)
Glossary	569	(2)
Problems	571	(5)
Schematic Interpretation Problems	576	(1)
Electronics Workbench®/MultiSIM® Exercises	577	(1)
CPLD Problems	578	(1)
Answers to Review Questions	579	(1)
Multivibrators and the 555 Timer	580	(36)
Outline	580	(1)
Objectives	580	(1)
Introduction	580	(1)
Multivibrators	581	(1)
Capacitor Charge and Discharge Rates	581	(4)
Astable Multivibrators	585	(2)
Monostable Multivibrators	587	(3)
Integrated-Circuit Monostable Multivibrators	590	(5)
Retriggerable Monostable Multivibrators	595	(3)
Astable Operation of the 555 IC Timer	598	(6)
Monostable Operation of the 555 IC Timer	604	(3)
Crystal Oscillators	607	(9)
Summary	609	(1)
Glossary	609	(1)
Problems	610	(3)
Schematic Interpretation Problems	613	(1)
Electronics Workbench®/MultiSIM® Exercises	614	(1)
Answers to Review Questions	615	(1)
Interfacing to the Analog World	616	(38)
Outline	616	(1)
Objectives	616	(1)
Introduction	616	(1)
Digital and Analog Representations	617	(1)
Operational Amplifier Basics	618	(1)
Binary-Weighted D/A Converters	619	(1)
R/2R Ladder D/A Converters	620	(2)
Integrated-Circuit D/A Converters	622	(4)
Integrated-Circuit Data Converter Specifications	626	(1)
Parallel-Encoded A/D Converters	627	(2)
Counter-Ramp A/D Converters	629	(1)
Successive-Approximation A/D Conversion	630	(2)
Integrated-Circuit A/D Converters	632	(6)
Data Acquisition System Application	638	(3)
Transducers and Signal Conditioning	641	(13)
Summary	646	(1)
Glossary	647	(1)
Problems	648	(3)
Schematic Interpretation Problems	651	(1)
Electronics Workbench®/MultiSIM® Exercises	652	(1)
Answers to Review Questions	653	(1)
Semiconductor, Magnetic, and Optical Memory	654	(40)
Outline	654	(1)
Objectives	654	(1)
Introduction	654	(1)
Memory Concepts	655	(3)
Static RAMs	658	(7)
Dynamic RAMs	665	(6)
Read-Only Memories	671	(7)
Memory Expansion and Address Decoding Applications	678	(5)
Magnetic and Optical Storage	683	(11)
Summary	687	(1)
Glossary	688	(1)
Problems	689	(3)
Schematic Interpretation Problems	692	(1)
Electronics Workbench®/MultiSIM® Exercises	693	(1)
Answers to Review Questions	693	(1)
Microprocessor Fundamentals	694	(22)
Outline	694	(1)
Objectives	694	(1)
Introduction	694	(1)
Introduction to System Components and Buses	695	(3)
Software Control of Microprocessor Systems	698	(1)
Internal Architecture of a Microprocessor	698	(2)
Instruction Execution within a Microprocessor	700	(3)
Hardware Requirements for Basic I/O Programming	703	(2)
Writing Assembly Language and Machine Language Programs	705	(3)
Survey of Microprocessors and Manufacturers	708	(8)
Summary of Instructions	709	(1)
Summary	709	(1)
Glossary	710	(2)
Problems	712	(2)
Schematic Interpretation Problems	714	(1)
Electronics Workbench®/MultiSIM® Exercises	714	(1)
Answers to Review Questions	715	(1)
The 8051 Microcontroller	716	(34)
Outline	716	(1)
Objectives	716	(1)
Introduction	717	(1)
The 8051 Family of Microcontrollers	717	(1)
8051 Architecture	717	(6)
Interfacing to External Memory	723	(2)
The 8051 Instruction Set	725	(6)
8051 Applications	731	(4)
Data Acquisition and Control System Application	735	(11)
Conclusion	746	(4)
Summary	746	(1)
Glossary	747	(1)
Problems	747	(2)
Schematic Interpretation Problems	749	(1)
APPENDIX A Web Sites	750	(2)
APPENDIX B Manufacturers' Data Sheets	752	(59)
APPENDIX C Explanation of the IEEE/IEC Standard for Logic Symbols (Dependency Notation)	811	(5)
APPENDIX D Answers to Odd-Numbered Problems	816	(24)
APPENDIX E CPLD Software Tutorials	840	(38)
E-1 Altera MAX+PLUSII	840	(16)
E-2 Xilinx Foundation	856	(22)
APPENDIX F Review of Basic Electricity Principles	878	(10)
APPENDIX G Schematic Diagrams for Chapter-End Problems	888	(10)
APPENDIX H 8051 Instruction Set Summary	898	(5)
Index	903	(4)
Supplemental Index of ICs	907