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9783540413417

Digital Signal Processing With Field Programmable Gate Arrays

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  • ISBN13:

    9783540413417

  • ISBN10:

    3540413413

  • Edition: 1st
  • Format: Hardcover
  • Copyright: 2001-12-01
  • Publisher: Springer Verlag
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Supplemental Materials

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Summary

Field-Programmable Gate Arrays (FPGAs) are on the verge of revolutionizing digital signal processing. Novel FPGA families are replacing ASICs and PDSPs for front end digital signal processing algorithms more and more. The efficient implementation of these algorithms is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 30 design examples. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, and advanced algorithms with high future potential. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices. The accompanying CD-ROM contains the examples in VHDL and Verilog code as well as the newest Altera "Baseline" software. "5 Stars: this book is well written and covers many of the aspects of DSP with FPGAs. I run a business that specializes exclusively in high performance DSP designs using FPGAs. This book pretty much covers it all, in fact it closely parallels the material we present in our DSP for FPGAs seminar. I very highly recommend this book." Ray Andraka of Andraka Consultants, N. Kingstown, RI

Table of Contents

Introduction
1(28)
Overview of Digital Signal Processing (DSP)
1(2)
FPGA Technology
3(6)
Classification by Granularity
3(2)
Classification by Technology
5(1)
Benchmark for FPLs
6(3)
DSP Technology Requirements
9(2)
FPGA and Programmable Signal Processors
10(1)
Design Implementation
11(18)
FPGA Structure
15(3)
The Altera EPF10K20RC240-4
18(3)
Case Study: Frequency Synthesizer
21(4)
Exercises
25(4)
Computer Arithmetic
29(50)
Introduction
29(1)
Number Representation
30(15)
Fixed-Point Numbers
30(3)
Unconventional Fixed-Point Numbers
33(11)
Floating-Point Numbers
44(1)
Binary Adders
45(8)
Pipelined Addres
47(5)
Modulo Adders
52(1)
Binary Multipliers
53(5)
Multiplier Blocks
57(1)
Multiply-Accumulator (MAC) and Sum of Product (SOP)
58(8)
Distributed Arithmetic Fundamentals
60(3)
Signed DA Systems
63(2)
Modified DA Solutions
65(1)
Computation of Special Functions Using CORDIC
66(13)
CORDIC Architectures
70(5)
Exercises
75(4)
Finite Impulse Response (FIR) Digital Filters
79(36)
Digital Filters
79(1)
FIR Theory
80(6)
FIR Filter with Transposed Structure
81(3)
Symmetry in FIR Filters
84(1)
Linear-Phase FIR Filters
85(1)
Designing FIR Filters
86(5)
Direct Window Design Method
87(2)
Equiripple Design Method
89(2)
Constant Coefficient FIR Design
91(24)
Direct FIR Design
92(4)
FIR Filter with Transposed Structure
96(2)
FIR Filter Using Distributed Arithmetic
98(15)
Exercises
113(2)
Infinite Impulse Response (IIR) Digital Filters
115(28)
IIR Theory
118(3)
IIR Coefficient Computation
121(3)
Summary of Important IIR Design Attributes
123(1)
IIR Filter Implementation
124(6)
Finite Wordlength Effects
128(1)
Optimization of the Filter Gain Factor
129(1)
Fast IIR Filter
130(13)
Time Domain Interleaving
131(2)
Clustered and Scattered Look-Ahead Pipelining
133(3)
IIR Decimator Design
136(1)
Parallel Processing
136(3)
IIR Design Using RNS
139(1)
Exercises
139(4)
Multirate Signal Processing
143(66)
Decimation and Interpolation
143(4)
Noble Identities
144(2)
Sampling Rate Conversion by Rational Factor
146(1)
Polyphase Decomposition
147(8)
Recursive IIR Decimator
151(1)
Fast-Running FIR Filter
152(3)
Hogenauer CIC Filters
155(17)
Single-Stage CIC Case Study
155(2)
Multistage CIC Filter Theory
157(5)
Amplitude and Aliasing Distortion
162(2)
Hogenauer Pruning Theory
164(6)
CIC RNS Design
170(2)
Multistage Decimator
172(3)
Multistage Decimator Design Using Goodman-Carey Halfband Filters
172(3)
Frequency Sampling Filters as Bandpass Decimators
175(3)
Filter Banks
178(19)
Uniform DFT Filter Bank
179(4)
Two-Channel Filter Banks
183(14)
Wavelets
197(12)
The Discrete Wavelet Transforamation
200(5)
Exercises
205(4)
Fourier Transforms
209(48)
The Discrete Fourier Transform Algorithms
210(17)
Fourier Transform Approximations Using the DFT
210(2)
Properties of the DFT
212(3)
The Goertzel Algorithm
215(1)
The Bluestein Chirp-z Transform
216(3)
The Rader Algorithm
219(6)
The Winograd DFT Algorithm
225(2)
The Fast Fourier Transform (FFT) Algorithms
227(20)
The Cooley-Tukey FFT Algorithm
228(11)
The Good-Thomas FFT Algorithm
239(2)
The Winograd FFT Algorithm
241(3)
Comparison of DFT and FFT Algorithms
244(3)
Fourier Related Transforms
247(10)
Computing the DCT Using the DFT
248(1)
Fast Direct DCT Implementation
249(2)
Exercises
251(6)
Advanced Topics
257(76)
Rectangular and Number Theoretic Transforms (NTTs)
257(18)
Arithmetic Modulo 2b ± 1
259(2)
Efficient Convolutions Using NTTs
261(1)
Fast Convolution Using NTTs
262(3)
Multidimensional Index Maps and the Agarwal-Burrus NTT
265(2)
Computing the DFT Matrix with NTTs
267(3)
Index Maps for NTTs
270(3)
Using Rectangular Transforms to Compute the DFT
273(2)
Error Control and Cryptography
275(35)
Basic Concepts from Coding Theory
276(5)
Block Codes
281(4)
Convolutional Codes
285(8)
Cryptography Algorithms for FPGAs
293(17)
Modulation and Demodulation
310(23)
Basic Modulation Concepts
310(4)
Incoherent Demodulation
314(6)
Coherent Demodulation
320(9)
Exercises
329(4)
References 333(10)
A. Verilog Source Code 343(44)
B. VHDL and Verilog Coding 387(20)
List of Examples
389(1)
Library of Parameterized Modules (LPM)
390(17)
The Parameterized Flip-flop Megafunction (lpm_ff)
390(4)
The Parameterized Adder/Subtractor Megafunction (lpm_add_sub)
394(5)
The Parameterized Multiplier Megafunction (lpm_mult)
399(4)
The Parameterized ROM Megafunction (lpm_rom)
403(4)
C. Glossary 407(4)
D. CD-ROM File: ``1readme.ps'' 411(8)
Index 419

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