Introduction to MORPHEUS | |
Introduction: A Heterogeneous Dynamically Reconfigurable SoC | p. 3 |
State of the Art: SoA of Reconfigurable Computing Architectures and Tools | p. 13 |
The MORPHEUS Architecture | |
MORPHEUS Architecture Overview: | p. 31 |
Flexeos Embedded FPGA Solution: Logic Reconfigurability on Silicon | p. 39 |
The Dream Digital Signal Processor: Architecture, Programming Model and Application Mapping | p. 49 |
XPP-III The XPP-III Reconfigurable Processor Core | p. 63 |
The Hardware Services | p. 77 |
The MORPHEUS Data Communication and Storage Infrastructure | p. 93 |
The Integrated Tool Chain | |
Overall MORPHEUS Toolset Flow | p. 109 |
The Molen Organisation and Programming Paradigm | p. 119 |
Control of Dynamic Reconfiguration | p. 129 |
Specification Tools for Spatial Design: Front-Ends for High Level Synthesis of Accelerated Operations | p. 139 |
Spatial Design: High Level Synthesis | p. 165 |
The Applications | |
Real-Time Digital Film Processing Mapping of a Film Grain Noise Reduction Algorithm to the MORPHEUS Platform | p. 185 |
Ethernet Based In-Service Reconfiguration of SoCs in Telecommunication Networks | p. 195 |
Homeland Security - Image Processing for Intelligent Cameras | p. 205 |
PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC | p. 217 |
Concluding Section | |
Conclusions: MORPHEUS Reconfigurable Platform - Results and Perspectives | p. 227 |
Training | p. 233 |
Dissemination of MORPHEUS Results: Spreading the Knowledge Developed in the Project | p. 251 |
Exploitation from the MORPHEUS Project: Perspectives of Exploitation About the Project Results | p. 261 |
Project Management | p. 267 |
List of Acronyms | p. 273 |
Index | p. 277 |
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