ESD : Failure Mechanisms and Models

by Steven H. Voldman (IEEE Fellow, Vermont, USA)

• ISBN13: 9780470747261
• ISBN10: 0470747269
• Format: eBook
• Copyright: 2009-07-01
• Publisher: Wiley

Summary

Electrostatic discharge (ESD) failure mechanisms continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics.This book studies electrical overstress, ESD, and latchup from a failure analysis and case-study approach. It provides a clear insight into the physics of failure from a generalist perspective, followed by investigation of failure mechanisms in specific technologies, circuits, and systems. The book is unique in covering both the failure mechanism and the practical solutions to fix the problem from either a technology or circuit methodology.Look inside for extensive coverage on: failure analysis tools, EOS and ESD failure sources and failure models of semiconductor technology, and how to use failure analysis to design more robust semiconductor components and systems; electro-thermal models and technologies; the state-of-the-art technologies discussed include CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power, gallium arsenide (GaAs), gallium nitride (GaN), magneto-resistive (MR) , giant magneto-resistors (GMR), tunneling magneto-resistor (TMR), devices; micro electro-mechanical (MEM) systems, and photo-masks and reticles; practical methods to use failure analysis for the understanding of ESD circuit operation, temperature analysis, power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics, (connecting the theoretical to the practical analysis); the failure of each key element of a technology from passives, active elements to the circuit, sub-system to package, highlighted by case studies of the elements, circuits and system-on-chip (SOC) in today's products.ESD: Failure Mechanisms and Models is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic era.

Table of Contents

About the Author

Preface

Acknowledgments

Failure Analysis and ESD

Introduction

ESD Failure: How Do Micro-electronic Devices Fail?

Sensitivity of Semiconductor Components

How Do Semiconductor Chips Fail--Are the Failures Random or Systematic?

Closing Comments and Summary

Problems

References

Failure Analysis Tools, Models, and Physics of Failure

FA Techniques for Evaluation of ESD Events

FA Tools

ESD Simulation: ESD Pulse Models

Electro-Thermal Physical Models

Statistical Models for ESD Prediction

Closing Comments and Summary

Problems

References

CMOS Failure Mechanisms

Tables of CMOS ESD Failure Mechanisms

LOCOS Isolation-Defined CMOS

Shallow Trench Isolation (STI)

Polysilicon-Defined Devices

Lateral Diode with Block Mask

MOSFETs

Resistors

Interconnects: Wires, Vias, and Contacts

ESD Failure in CMOS Nanostructures

Closing Comments and Summary

Problems

References

CMOS Circuits: Receivers and Off-Chip Drivers

Tables of CMOS Receiver and OCD ESD Failure Mechanisms

Receiver Circuits

Receivers Circuits with ESD Networks

Receiver Circuits with Half-Pass Transmission Gate

Receiver with Full-Pass Transmission Gate

Receiver, Half-Pass Transmission Gate, and Keeper Network

Receiver Circuit with Pseudo-zero V_T

Half-Pass Transmission Gate

Receiver with Zero V_T

Transmission Gate

Receiver Circuits with Bleed Transistors

Receiver Circuits with Test Functions

Receiver with Schmitt Trigger Feedback Networks

Off-Chip Drivers

Single NFET Pull-down OCD

Series Cascode MOSFETs

I/O Design Considerations and ESD Parasitic Failure Mechanisms

Closing Comments and Summary

Problems

References

CMOS Integration

Table of CMOS Integration ESD Failure Mechanisms

Architecture and Design Synthesis-Related Failures

Alternate Current Loop

Chip Capacitance

ESD Power Clamps

Intra- and Inter-domain ESD Protection

Split Ground Configurations

Mixed Voltage Interface

Mixed Signal Interface

Inter-domain Signal Line ESD Failures

Decoupling Capacitors

System Clock and Phase-Locked Loop

Fuse Networks

Bond Pads

MOSFET Gate Structure

Fill Shapes

No Connects

Test Circuitry

Multi-chip Systems

CMOS Latchup Failures

Closing Comments and Summary

Problems

References

SOI ESD Failure Mechanisms

Tables of SOI Device and Integration ESD Failure Mechanisms

SOI N-channel MOSFETs

SOI Diodes

SOI Buried Resistors

SOI Failure Mechanisms in 150 nm Technology

SOI ESD Failure Mechanisms in 45 nm Technology

SOI ESD Failure Mechanisms in 32 nm Technology

SOI ESD Failure Mechanisms in 22 nm Technology and the Future

SOI Design Synthesis and ESD Failure Mechanisms

SOI Integration: ESD Failure Mechanisms

Closing Comments and Summary

Problems

References

RF CMOS and ESD

Tables of RF CMOS ESD Failure Mechanisms

RF MOSFET

RF Shallow Trench Isolation Diode

RF Polysilicon Gated Diode

Silicon-Controlled Rectifier

Schottky Barrier Diodes

Capacitors

Resistors

Inductors

Examples of RF ESD Circuit Failure Mechanisms

Closing Comments and Summary

Problems

Reference

Micro-electromechanical Systems

Table of MEM Failure Mechanisms

Electrostatically Actuated Devices

Micro-mechanical Engines

Torsional Ratcheting Actuator

Electromagnetic Micro-power Generators

MEM Inductors

Electrostatically Actuated Variable Capacitor

Micro-mechanical Switches

RF MEM Switch

Micro-mechanical Mirrors

Electrostatically Actuated Torsional Micro-mirrors

Closing Comments and Summary

Problems

References

Gallium Arsenide

Tables of GaAs-Based ESD Failure Mechanisms

GaAs Technology

GaAs Energy-to-failure and Power-to-failure

GaAs ESD Failures in Active and Passive Elements

GaAs HBT Devices

GaAs HBT-Based Passive Elements

GaAs PHEMT Devices

GaAs Power Amplifiers

InGaAs

Gallium Nitride

InP and ESD

Closing Comments and Summary

Problems

References

Smart Power, LDMOS, and BCD Technology

Tables of LDMOS ESD Failure Mechanisms

LOCOS-Defined LDMOS Devices

STI-Defined LDMOS Devices

STI-Defined Isolated LDMOS Transistors

LDMOS Transistors: ESD Electrical Measurements

LDMOS-Based ESD Networks

LDMOS ESD Failure Mechanisms

LDMOS Transistor Design Enhancement

Latchup Events in LDMOS and BCD Technology

Closing Comments and Summary

Problems

References

Magnetic Recording

Tables of Magnetic Recording Failure Mechanisms

MR Heads

Inductive Heads

GMR Heads

TMR Heads

ESD Solutions

Closing Comments and Summary

Problems

References

Photo-masks and Reticles: Failure Mechanisms

Table of Photo-masks ESD Failure Mechanisms

Photo-mask Failure Mechanisms

Photo-mask Inspection Tools

Photo-mask ESD Characterization

Electrical Breakdown Versus Gap Spacing

Electrical Breakdown in Air: The Townsend Model

Electric Breakdown in Air: Toepler's Spark Law

Air Breakdown: The Paschen Breakdown Model

Paschen Curve Versus Reticle Breakdown Plot

Electrical Model of Photo-mask Breakdown

ESD Latent Damage

ESD Damage for Single Versus Multiple Events

ESD Damage to Anti-reflective Coating

ESD Solutions in Photo-masks

Closing Comments and Summary

Problems

References

Index

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