What is included with this book?
Pong P. Chu, PhD, is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.
Preface | |
Acknowledgments | |
Basic Digital Circuits | |
Gate-level combinational circuit | |
Introduction | |
General description | |
Basic lexical rules | |
Library and package | |
Entity declaration | |
Data type and operators | |
Architecture body | |
Code of a 2-bit comparator | |
Structural description | |
Testbench | |
Bibliographic notes | |
Suggested experiments | |
Code for gate-level greater-than circuit | |
Code for gate-level binary decoder | |
Overview of FPGA and EDA software | |
Introduction | |
FPGA | |
Overview of general FPGA device | |
Overview of Xilinx Spartan-3 device | |
Overview of Digilent S3 board | |
Design flow | |
Overview of Xilinx ISE project navigator | |
Short tutorial of ISE project navigator | |
Create the design project and HDL codes | |
Create a testbench and perform RTL simulation | |
Add a constraint file and synthesize and implement the code | |
Generate and download the configuration file to FPGA devices | |
Short tutorial of ModelSim HDL simulator | |
Bibliographic notes | |
Suggested experiments | |
Gate-level greater-than circuit | |
Gate-level binary decoder | |
RT-level combinational circuit | |
Introduction | |
RT-level components | |
Relational operators | |
Arithmetic operators | |
Other synthesis related VHDL constructs | |
Summary | |
Routing circuit with concurrent assignment statements | |
Conditional signal assignment statement | |
Selected signal assignment statement | |
Modeling with process | |
Process | |
Sequential signal assignment statement | |
Routing circuit with if and case statements | |
If statement | |
Case statement | |
Comparison to concurrent statements | |
Unintended memory | |
Constant and generic | |
Constant | |
Generic | |
Design examples | |
Hexadecimal digit to seven-segment LED decoder | |
Sign-magnitude adder | |
Barrel shifter | |
A simplified floating-point adder | |
Bibliographic notes | |
Suggested experiments | |
Multi-function barrel shifter | |
Dual priority encoder | |
BCD incrementor | |
Floating-point greater-than circuit | |
Floating-point and signed integer conversion circuit | |
Enhanced floating-point adder | |
Regular Sequential Circuit | |
Overview | |
D FF and register | |
Synchronous system | |
Code development | |
HDL code of FF and register | |
D FF | |
Register | |
Register File | |
Storage components in Spartan-3 deviceXilinx specific | |
Simple design examples | |
Shift register | |
Binary counter and variant | |
Testbench for sequential circuits | |
Case study | |
LED time multiplexing circuit | |
Stopwatch | |
FIFO buffer | |
Bibliographic notes | |
Suggested experiments | |
Programmable square wave generator | |
PWM and LED dimmer | |
Rotating square circuit | |
Heartbeat circuit | |
Rotating LED banner circuit | |
Enhanced stopwatch | |
Stack | |
FSM | |
Overview | |
Mealy and Moore outputs | |
FSM representation | |
FSM code development | |
Design examples | |
Rising edge detector | |
Debouncing circuit | |
Testing circuit | |
Bibliographic notes | |
Suggested experiments | |
Dual-edge detector | |
Altern | |
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