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9780521832946

Fundamentals of Modern VLSI Devices

by
  • ISBN13:

    9780521832946

  • ISBN10:

    0521832942

  • Edition: 2nd
  • Format: Hardcover
  • Copyright: 2009-08-28
  • Publisher: Cambridge University Press
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Summary

Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

Author Biography

Yuan Taur is a Professor of Electrical and Computer Engineering at the University of California, San Diego. He spent 20 years at IBM's T.J. Watson Research Center where he won numerous invention and achievement awards. He is an IEEE Fellow, Editor-in-Chief of IEEE Electron Device Letters, and holds 14 US patents. Tak H. Ning is an IBM Fellow at the T.J. Watson Research Center, New York, where he has worked for over 35 years. He is a Fellow of the IEEE and the American Physical Society, a member of the US National Academy of Engineering, and holds 36 US patents.

Table of Contents

Preface to the first editionp. xi
Preface to the second editionp. xiii
Physical constants and unit conversionsp. xv
List of symbolsp. xvi
Introductionp. 1
Evolution of VLSI Device Technologyp. 1
Historical Perspectivep. 1
Recent Developmentsp. 4
Modern VLSI Devicesp. 4
Modern CMOS Transistorsp. 4
Modern Bipolar Transistorsp. 5
Scope and Brief Description of the Bookp. 6
Basic Device Physicsp. 11
Electrons and Holes in Siliconp. 11
Energy Bands in Siliconp. 11
n-Type and p-Type Siliconp. 17
Carrier Transport in Siliconp. 23
Basic Equations for Device Operationp. 27
p-n Junctionsp. 35
Energy-Band Diagrams for a p-n Diodep. 35
Abrupt Junctionsp. 38
The Diode Equationp. 46
Current-Voltage Characteristicsp. 51
Time-Dependent and Switching Characteristicsp. 64
Diffusion Capacitancep. 70
MOS Capacitorsp. 72
Surface Potential: Accumulation, Depletion, and Inversionp. 72
Electrostatic Potential and Charge Distribution in Siliconp. 78
Capacitances in an MOS Structurep. 85
Polysilicon-Gate Work Function and Depletion Effectsp. 91
MOS under Nonequilibrium and Gated Diodesp. 94
Charge in Silicon Dioxide and at the Silicon-Oxide Interfacep. 98
Effect of Interface Traps and Oxide Charge on Device Characteristicsp. 103
Metal-Silicon Contactsp. 108
Static Characteristics of a Schottky Barrier Diodep. 108
Current Transport in a Schottky Barrier Diodep. 115
Current-Voltage Characteristics of a Schottky Barrier Diodep. 115
Ohmic Contactsp. 120
High-Field Effectsp. 122
Impact Ionization and Avalanche Breakdownp. 122
Band-to-Band Tunnelingp. 125
Tunneling into and through Silicon Dioxidep. 127
Injection of Hot Carriers from Silicon into Silicon Dioxidep. 133
High-Field Effects in Gated Diodesp. 135
Dielectric Breakdownp. 137
Exercisesp. 141
Mosfet Devicesp. 148
Long-Channel Mosfetsp. 148
Drain-Current Modelp. 149
Mosfet I-V Characteristicsp. 155
Subthreshold Characteristicsp. 163
Substrate Bias and Temperature Dependence of Threshold Voltagep. 166
Mosfet Channel Mobilityp. 169
Mosfet Capacitances and Inversion-Layer Capacitance Effectp. 172
Short-Channel Mosfetsp. 175
Short-Channel Effectp. 176
Velocity Saturation and High-Field Transportp. 186
Channel Length Modulationp. 195
Source-Drain Series Resistancep. 196
Mosfet Degradation and Breakdown at High Fieldsp. 196
Exercisesp. 201
CMOS Device Designp. 204
Mosfet Scalingp. 204
Constant-Field Scalingp. 204
Generalized Scalingp. 207
Nonscaling Effectsp. 210
Threshold Voltagep. 212
Threshold-Voltage Requirementp. 213
Channel Profile Designp. 217
Nonuniform Dopingp. 224
Quantum Effect on Threshold Voltagep. 234
Discrete Dopant Effects on Threshold Voltagep. 239
Mosfet Channel Lengthp. 242
Various Definitions of Channel Lengthp. 242
Extraction of the Effective Channel Lengthp. 244
Physical Meaning of Effective Channel Lengthp. 248
Extraction of Channel Length by C-V Measurementsp. 252
Exercisesp. 254
CMOS Performance Factorsp. 256
Basic CMOS Circuit Elementsp. 256
CMOS Invertersp. 256
CMOS NAND and NOR Gatesp. 266
Inverter and NAND Layoutsp. 270
Parasitic Elementsp. 273
Source-Drain Resistancep. 274
Parasitic Capacitancesp. 277
Gate Resistancep. 280
Interconnect R and Cp. 283
Sensitivity of CMOS Delay to Device Parametersp. 289
Propagation Delay and Delay Equationp. 289
Delay Sensitivity to Channel Width, Length, and Gate Oxide Thicknessp. 296
Sensitivity of Delay to Power-supply Voltage and Threshold Voltagep. 299
Sensitivity of Delay to Parasitic Resistance and Capacitancep. 301
Delay of Two-Way NAND and Body Effectp. 304
Performance Factors of Advanced CMOS Devicesp. 307
Mosfets in RF Circuitsp. 308
Effect of Transport Parameters on CMOS Performancep. 311
Low-Temperature CMOSp. 312
Exercisesp. 315
Bipolar Devicesp. 318
n-p-n Transistorsp. 318
Basic Operation of a Bipolar Transistorp. 322
Modifying the Simple Diode Theory for Describing Bipolar Transistorsp. 322
Ideal Current-Voltage Characteristicsp. 327
Collector Currentp. 329
Base Currentp. 330
Current Gainsp. 334
Ideal Ic-VCE Characteristicsp. 336
Characteristics of a Typical n-p-n Transistorp. 337
Effect of Emitter and Base Series Resistancesp. 338
Effect of Base-Collector Voltage on Collector Currentp. 340
Collector Current Falloff at High Currentsp. 343
Nonideal Base Current at Low Currentsp. 347
Bipolar Device Models for Circuit and Time-Dependent Analysesp. 352
Basic de Modelp. 352
Basic ac Modelp. 355
Small-Signal Equivalent-Circuit Modelp. 356
Emitter Diffusion Capacitancep. 359
Charge-Control Analysisp. 361
Breakdown Voltagesp. 366
Common-Base Current Gain in the Presence of Base-Collector Junction Avalanchep. 367
Saturation Currents in a Transistorp. 369
Relation Between BV CEO and BV CBOp. 370
Exercisesp. 371
Bipolar Device Designp. 374
Design of the Emitter Regionp. 374
Diffused or Implanted-and-Diffused Emitterp. 375
Polysilicon Emitterp. 376
Design of the Base Regionp. 377
Relationship between Base Sheet Resistivity and Collector Current Densityp. 378
Intrinsic-Base Dopant Distributionp. 380
Electric Field in the Quasineutral Intrinsic Basep. 381
Base Transit Timep. 384
Design of the Collector Regionp. 385
Collector Design When There is Negligible Base Wideningp. 387
Collector Design When There is Appreciable Base Wideningp. 388
SiGe-Base Bipolar Transistorsp. 389
Transistors Having a Simple Linearly Graded Base Bandgapp. 390
Base Current When Ge Is Present in the Emitterp. 396
Transistors Having a Trapezoidal Ge Distribution in the Basep. 401
Transistors Having a Constant Ge Distribution in the Basep. 406
Effect of Emitter Depth Variation on Device Characteristicsp. 410
Some Optimal Ge Profilesp. 414
Base-Width Modulation by VBEp. 419
Reverse-Mode I-V Characteristicsp. 423
Heterojunction Nature of a SiGe-Base Bipolar Transistorp. 426
Modern Bipolar Transistor Structuresp. 429
Deep-Trench Isolationp. 429
Polysilicon Emitterp. 430
Self-Aligned Polysilicon Base Contactp. 430
Pedestal Collectorp. 431
SiGe-Basep. 431
Exercisesp. 432
Bipolar Performance Factorsp. 437
Figures of Merit of a Bipolar Transistorp. 437
Cutoff Frequencyp. 437
Maximum Oscillation Frequencyp. 440
Ring Oscillator and Gate Delayp. 440
Digital Bipolar Circuitsp. 441
Delay Components of a Logic Gatep. 442
Device Structure and Layout for Digital Circuitsp. 445
Bipolar Device Optimization for Digital Circuitsp. 447
Design Points for a Digital Circuitp. 447
Device Optimization When there is Significant Base Wideningp. 448
Device Optimization When There is Negligible Base Wideningp. 449
Device Optimization for Small Power-Delay Productp. 453
Bipolar Device Optimization from Some Data Analysesp. 455
Bipolar Device Scaling for ECL Circuitsp. 457
Device Scaling Rulesp. 458
Limits in Bipolar Device Scaling for ECL Circuitsp. 460
Bipolar Device Optimization and Scaling for RF and Analog Circuitsp. 463
The Single-Transistor Amplifierp. 463
Optimizing the Individual Parametersp. 464
Technology for RF and Analog Bipolar Devicesp. 467
Limits in Scaling Bipolar Transistors for RF and Analog Applicationsp. 468
Comparing a SiGe-Base Bipolar Transistor with a GaAs HBTp. 469
Exercisesp. 472
Memory Devicesp. 476
Static Random-Access Memoryp. 477
CMOS SRAM Cellp. 478
Other Bistable MOSFET SRAM Cellsp. 486
Bipolar SRAM Cellp. 487
Dynamic Random-Access Memoryp. 495
Basic DRAM Cell and Its Operationp. 496
Device Design and Scaling Considerations for a DRAM Cellp. 499
Nonvolatile Memoryp. 500
Mosfet Nonvolatile Memory Devicesp. 501
Flash Memory Arraysp. 507
Floating-Gate Nonvolatile Memory Cellsp. 511
Nonvolatile Memory Cells with Charge Stored in Insulatorp. 514
Exercisep. 516
Silicon-on-Insulator Devicesp. 517
SOI CMOSp. 517
Partially Depleted SOI Mosfetsp. 518
Fully Depleted SOI Mosfetsp. 520
Thin-Silicon SOI Bipolarp. 523
Fully Depleted Collector Modep. 524
Partially Depleted Collector Modep. 526
Accumulation Collector Modep. 527
Discussionp. 527
Double-Gate Mosfetsp. 529
An Analytic Drain Current Model for Symmetric DG Mosfetsp. 529
The Scale Length of Double-Gate Mosfetsp. 533
Fabrication Requirements and Challenges of DG Mosfetsp. 534
Multiple-Gate Mosfetsp. 536
Exercisep. 537
CMOS Process Flowp. 538
Outline of a Process for Fabricating Modern n-p-n Bipolar Transistorsp. 542
Einstein Relationsp. 543
Spatial Variation of Quasi-Fermi Potentialsp. 546
Generation and Recombination Processes and Space-Charge-Region Currentp. 553
Diffusion Capacitance of a p-n Diodep. 562
Image-Force-Induced Barrier Loweringp. 569
Electron-Initiated and Hole-Initiated Avalanche Breakdownp. 573
An Analytical Solution for the Short-Channel Effect in Subthresholdp. 575
Generalized Mosfet Scale Length Modelp. 582
Drain Current Model of a Ballistic Mosfetp. 588
Quantum-Mechanical Solution in Weak Inversionp. 594
Power Gain of a Two-Port Networkp. 598
Unity-Gain Frequencies of a Mosfet Transistorp. 601
Determination of Emitter and Base Series Resistancesp. 605
Intrinsic-Base Resistancep. 610
Energy-Band Diagram of a Si-SiGe n-p Diodep. 614
ftand fmax of a Bipolar Transistorp. 617
Referencesp. 623
Indexp. 644
Table of Contents provided by Ingram. All Rights Reserved.

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