Genetic Programming IV: Routine Human-Competitive Machine Intelligence

by Koza, John R.; Keane, Martin A.; Streeter, Matthew J.; Mydlowec, William; Yu, Jessen; Lanza, Guido

• ISBN13: 9780387250670
• ISBN10: 0387250670
• Edition: DVD
• Format: Paperback
• Copyright: 2005-03-30
• Publisher: Springer-Verlag New York Inc

Summary

Genetic Programming IV: Routine Human-Competitive Machine Intelligence presents the application of GP to a wide variety of problems involving automated synthesis of controllers, circuits, antennas, genetic networks, and metabolic pathways. The book describes fifteen instances where GP has created an entity that either infringes or duplicates the functionality of a previously patented 20th-century invention, six instances where it has done the same with respect to post-2000 patented inventions, two instances where GP has created a patentable new invention, and thirteen other human-competitive results. The book additionally establishes: GP now delivers routine human-competitive machine intelligence GP is an automated invention machine GP can create general solutions to problems in the form of parameterized topologies GP has delivered qualitatively more substantial results in synchrony with the relentless iteration of Moore's Law

Table of Contents

Introduction	1	(28)
Genetic Programming Now Routinely Delivers High-Return Human-Competitive Machine Intelligence	3	(12)
What We Mean by ``Human-Competitive''	3	(1)
What We Mean by ``High-Return''	4	(1)
What We Mean by ``Routine''	5	(1)
What We Mean by ``Machine Intelligence''	6	(1)
Human-Competitiveness of the Results Produced by Genetic Programming	7	(3)
High-Return of the Results Produced by Genetic Programming	10	(4)
Routineness of the Results Produced by Genetic Programming	14	(1)
Machine Intelligence	15	(1)
Genetic Programming Is an Automated Invention Machine	15	(8)
The Illogical Nature of Invention and Evolution	19	(1)
Overcoming Established Beliefs	20	(1)
Automating the Invention Process	21	(1)
Patentable New Inventions Produced by Genetic Programming	22	(1)
Genetic Programming Can Automatically Create Parameterized Topologies	23	(2)
Historical Progression of Qualitatively More Substantial Results Produced by Genetic Programming in Synchrony with Increasing Computer Power	25	(4)
Background on Genetic Programming	29	(20)
Preparatory Steps of Genetic Programming	29	(2)
Executional Steps of Genetic Programming	31	(7)
Example of a Run of Genetic Programming	34	(4)
Advanced Features of Genetic Programming	38	(4)
Constrained Syntactic Structures	38	(1)
Automatically Defined Functions	39	(1)
Automatically Defined Iterations, Automatically Defined Loops, Automatically Defined Recursions, and Automatically Defined Stores	40	(1)
Program Architecture and Architecture-Altering Operations	40	(1)
Genetic Programming Problem Solver	41	(1)
Developmental Genetic Programming	41	(1)
Computer Code for Implementing Genetic Programming	42	(1)
Main Points of Four Books on Genetic Programming	42	(3)
Sources of Additional Information about Genetic Programming	45	(4)
Automatic Synthesis of Controllers	49	(80)
Background on Controllers	50	(2)
Design Considerations for Controllers	52	(1)
Representation of a Controller by a Block Diagram	53	(5)
Possible Techniques for Designing Controllers	58	(6)
Search by Hill Climbing	59	(1)
Search by Gradient Methods	60	(1)
Search by Simulated Annealing	61	(1)
Search by Genetic Algorithm and Genetic Programming	61	(1)
Previous Work on Controller Synthesis by Means of Genetic and Evolutionary Computation	62	(1)
Possible Approaches to Automatic Controller Synthesis Using Genetic Programming	62	(2)
Our Approach to the Automatic Synthesis of the Topology and Tuning of Controllers	64	(9)
Repertoire of Functions	65	(2)
Repertoire of Terminals	67	(1)
Representing the Plant	67	(1)
Automatically Defined Functions	68	(1)
Three Approaches for Establishing Numerical Parameter Values	69	(1)
Arithmetic-Performing Subtrees	70	(1)
Perturbable Numerical Value	70	(1)
Arithmetic-Performing Subtree Containing Perturbable Numerical Values	71	(2)
Constrained Syntactic Structure for Program Trees	73	(1)
Additional Representations of Controllers	73	(14)
Representation of a Controller by a Transfer Function	73	(1)
Representation of a Controller as a LISP Symbolic Expression	74	(1)
Representation of a Controller as a Program Tree	74	(1)
Representation of a Controller in Mathematica	75	(1)
Representation of a Controller and Plant as a Connection List	75	(3)
Representation of a Controller and Plant as a SPICE Netlist	78	(9)
Two-Lag Plant	87	(26)
Preparatory Steps for the Two-Lag Plant	88	(1)
Program Architecture	88	(1)
Terminal Set	88	(1)
Function Set	89	(1)
Fitness Measure	89	(6)
Control Parameters	95	(1)
Termination Criterion and Results Designation	95	(1)
Knowledge Incorporated into the Preparatory Steps	96	(6)
Results for the Two-Lag Plant	102	(9)
Human-Competitiveness of the Result for the Two-Lag Plant Problem	111	(1)
AI Ratio for the Two-Lag Plant Problem	112	(1)
Three-Lag Plant	113	(7)
Preparatory Steps for the Three-Lag Plant	114	(1)
Program Architecture	114	(1)
Terminal Set	114	(1)
Function Set	114	(1)
Fitness Measure	114	(1)
Control Parameters	115	(1)
Results for the Three-Lag Plant	115	(4)
Routineness for the Three-Lag Plant Problem	119	(1)
AI Ratio for the Three-Lag Plant Problem	119	(1)
Three-Lag Plant with a Five-Second Delay	120	(5)
Preparatory Steps for the Three-Lag Plant with a Five-Second Delay	120	(1)
Program Architecture	120	(1)
Terminal Set	120	(1)
Function Set	121	(1)
Fitness Measure	121	(1)
Control Parameters	122	(1)
Results for the Three-Lag Plant with a Five-Second Delay	122	(1)
Routineness for the Three-Lag Plant with a Five-Second Delay	123	(1)
AI Ratio for the Three-Lag Plant with a Five-Second Delay	123	(2)
Non-Minimal-Phase Plant	125	(4)
Preparatory Steps for the Non-Minimal-Phase Plant	125	(1)
Program Architecture	125	(1)
Terminal Set	125	(1)
Function Set	125	(1)
Fitness Measure	125	(1)
Control Parameters	125	(1)
Results for the Non-Minimal Phase Plant	125	(2)
Routineness for the Non-Minimal Phase Plant Problem	127	(1)
AI Ratio for the Non-Minimal Phase Plant Problem	127	(2)
Automatic Synthesis of Circuits	129	(46)
Our Approach to the Automatic Synthesis of the Topology and Sizing of Circuits	131	(4)
Evolvable Hardware	134	(1)
Searching for the Impossible	135	(12)
Preparatory Steps for the RC Circuit with Gain Greater than Two	138	(1)
Initial Circuit	138	(1)
Program Architecture	139	(1)
Function Set	139	(1)
Terminal Set	140	(1)
Fitness Measure	141	(1)
Control Parameters	142	(1)
Results for the RC Circuit with Gain Greater than Two	142	(1)
Routineness of the Transition from a Problem of Controller Synthesis to a Problem of Circuit Synthesis	143	(2)
AI Ratio for the RC Circuit with Gain Greater than Two	145	(2)
Reinvention of the Philbrick Circuit	147	(6)
Preparatory Steps for the Philbrick Circuit	148	(1)
Initial Circuit	148	(1)
Program Architecture	149	(1)
Terminal Set	149	(1)
Function Set	149	(1)
Fitness Measure	149	(1)
Control Parameters	150	(1)
Results for the Philbrick Circuit	150	(1)
Human-Competitiveness of the Result for the Philbrick Circuit Problem	151	(1)
Routineness for the Philbrick Circuit Problem	152	(1)
AI Ratio for the Philbrick Circuit Problem	153	(1)
Circuit for the NAND Function	153	(6)
Preparatory Steps for the NAND Circuit	154	(1)
Initial Circuit	154	(1)
Program Architecture	154	(1)
Terminal Set	154	(1)
Function Set	154	(2)
Fitness Measure	156	(1)
Control Parameters	157	(1)
Termination Criterion	157	(1)
Results for the NAND Circuit	157	(1)
Human-Competitiveness of the Result for the NAND Circuit Problem	158	(1)
Routineness for the NAND Circuit Problem	159	(1)
AI Ratio for the NAND Circuit Problem	159	(1)
Evolution of a Computer	159	(3)
Preparatory Steps for the Arithmetic Logic Unit	160	(1)
Initial Circuit	160	(1)
Fitness Measure	160	(1)
Control Parameters	161	(1)
Results for the Arithmetic Logic Unit	161	(1)
Routineness for the Arithmetic Logic Unit Circuit Problem	161	(1)
AI Ratio for the Arithmetic Logic Unit Circuit Problem	162	(1)
Square Root Circuit	162	(6)
Preparatory Steps for Square Root Circuit	163	(1)
Initial Circuit	163	(1)
Program Architecture	163	(1)
Terminal Set	163	(1)
Function Set	163	(1)
Fitness Measure	163	(2)
Control Parameters	165	(1)
Results for Square Root Circuit	165	(3)
Routineness for the Square Root Circuit Problem	168	(1)
Al Ratio for the Square Root Circuit Problem	168	(1)
Automatic Circuit Synthesis Without an Explicit Test Fixture	168	(7)
Preparatory Steps for the Lowpass Filter Problem Without an Explicit Test Fixture	169	(1)
Initial Circuit	169	(2)
Program Architecture	171	(1)
Function Set	171	(1)
Terminal Set	171	(1)
Fitness Measure	172	(1)
Control Parameters	173	(1)
Results for the Lowpass Filter Problem without an Explicit Test Fixture	173	(1)
Routineness for the Lowpass Filter Problem without an Explicit Test Fixture	174	(1)
Al Ratio for the Lowpass Filter Problem without an Explicit Test Fixture	174	(1)
Automatic Synthesis of Circuit Topology, Sizing, Placement, and Routing	175	(30)
Our Approach to the Automatic Synthesis of Circuit Topology, Sizing, Placement, and Routing	177	(9)
Initial Circuit	177	(1)
Circuit-Constructing Functions	178	(1)
Component-Creating Functions	179	(2)
Topology-Modifying Functions	181	(5)
Development-Controlling Functions	186	(1)
Developmental Process	186	(1)
Lowpass Filter with Layout	186	(11)
Preparatory Steps for the Lowpass Filter with Layout	186	(1)
Initial Circuit	186	(1)
Program Architecture	186	(1)
Function Set	186	(1)
Terminal Set	187	(1)
Fitness Measure	187	(1)
Control Parameters	188	(1)
Results for the Lowpass Filter with Layout	188	(7)
Human-Competitiveness of the Result for the Lowpass Filter Problem with Layout	195	(1)
Routineness of the Transition from a Problem of Circuit Synthesis without Layout to a Problem of Circuit Synthesis with Layout	196	(1)
AI Ratio for the Lowpass Filter Problem with Layout	197	(1)
60dB Amplifier with Layout	197	(8)
Preparatory Steps for 60dB Amplifier with Layout	197	(1)
Initial Circuit	197	(1)
Program Architecture	197	(1)
Function Set	198	(1)
Terminal Set	198	(1)
Fitness Measure	198	(1)
Control Parameters	199	(1)
Results for 60dB Amplifier with Layout	199	(3)
Routineness for the 60dB Amplifier Problem with Layout	202	(1)
AI Ratio for the 60dB Amplifier Problem with Layout	203	(2)
Automatic Synthesis of Antennas	205	(16)
Our Approach to the Automatic Synthesis of the Geometry and Sizing of Antennas	206	(1)
Illustrative Problem of Antenna Synthesis	207	(2)
Repertoire of Functions and Terminals	209	(3)
Repertoire of Functions	209	(1)
Repertoire of Terminals	210	(1)
Example of the Use of the Functions and Terminals	211	(1)
Preparatory Steps for the Antenna Problem	212	(4)
Program Architecture	212	(1)
Function Set	212	(1)
Terminal Set	212	(1)
Fitness Measure	212	(4)
Control Parameters	216	(1)
Results for the Antenna Problem	216	(3)
Routineness of the Transition from Problems of Synthesizing Controllers, Circuits, and Circuit Layout to a Problem of Synthesizing an Antenna	219	(1)
AI Ratio for the Antenna Problem	220	(1)
Automatic Synthesis of Genetic Networks	221	(8)
Statement of the Illustrative Problem	221	(2)
Representation of Genetic Networks by Computer Programs	223	(1)
Repertoire of Functions	223	(1)
Repertoire of Terminals	224	(1)
Preparatory Steps	224	(1)
Program Architecture	224	(1)
Function Set	224	(1)
Terminal Set	224	(1)
Fitness Measure	224	(1)
Control Parameters	225	(1)
Results	225	(4)
Routineness of the Transition from Problems of Synthesizing Controllers, Circuits, Circuits With Layout, and Antennas to a Problem of Genetic Network Synthesis	226	(1)
AI Ratio for the Genetic Network Problem	227	(2)
Automatic Synthesis of Metabolic Pathways	229	(52)
Our Approach to the Automatic Synthesis of the Topology and Sizing of Networks of Chemical Reactions	230	(1)
Statement of Two Illustrative Problems	231	(3)
Types of Chemical Reactions	234	(16)
One-Substrate, One-Product Reaction	234	(9)
One-Substrate, Two-Product Reaction	243	(1)
Two-Substrate, One-Product Reaction	244	(4)
Two-Substrate, Two-Product Reaction	248	(2)
Representation of Networks of Chemical Reactions by Computer Programs	250	(13)
Representation as a Program Tree	250	(1)
Repertoire of Functions in the Program Tree	250	(1)
Repertoire of Terminals	251	(1)
Constrained Syntactic Structure	251	(1)
Example of a Program Tree	251	(4)
Representation as a Symbolic Expression	255	(1)
Representation as a System of Nonlinear Differential Equations	256	(3)
Representation as an Analog Electrical Circuit	259	(3)
Flexibility of the Representation	262	(1)
Preparatory Steps	263	(4)
Program Architecture	263	(1)
Function Set	264	(1)
Terminal Set	264	(1)
Fitness Measure	264	(3)
Control Parameters	267	(1)
Results for the Phospholipid Cycle	267	(8)
Routineness of the Transition from Problems of Synthesizing Controllers, Circuits, Circuits with Layout, Antennas, and Genetic Networks to a Problem of Synthesis of a Network of Chemical Reactions	274	(1)
AI Ratio for the Metabolic Pathway Problem for the Phospholipid Cycle	275	(1)
Results for the Synthesis and Degradation of Ketone Bodies	275	(3)
Routineness for the Metabolic Pathway Problem Involving Ketone Bodies	278	(1)
AI Ratio for the Metabolic Pathway Problem Involving Ketone Bodies	278	(1)
Future Work on Metabolic Pathways	278	(3)
Improved Program Tree Representation	278	(1)
Null Enzyme	278	(1)
Minimum Amount of Data Needed	278	(1)
Opportunities to Use Knowledge	279	(1)
Designing Alternative Metabolisms	279	(2)
Automatic Synthesis of Parameterized Topologies for Controllers	281	(20)
Parameterized Controller for a Three-Lag Plant	282	(9)
Preparatory Steps for the Parameterized Controller for a Three-Lag Plant	283	(1)
Program Architecture	283	(1)
Terminal Set	283	(1)
Function Set	284	(1)
Fitness Measure	284	(2)
Control Parameters	286	(1)
Results for the Parameterized Controller for a Three-Lag Plant	286	(4)
Routineness of the Transition from a Problem Involving a Non-Parameterized Controller to a Problem Involving a Parameterized Controller	290	(1)
AI Ratio for the Parameterized Controller for a Three-Lag Plant	291	(1)
Parameterized Controller for Two Families of Plants	291	(10)
Preparatory Steps for the Parameterized Controller for Two Families of Plants	292	(1)
Program Architecture	292	(1)
Terminal Set	292	(1)
Function Set	293	(1)
Fitness Measure	293	(3)
Control Parameters	296	(1)
Results for the Parameterized Controller for Two Families of Plants	296	(3)
Human-Competitiveness of the Result for the Parameterized Controller for Two Families of Plants	299	(1)
Routineness for the Parameterized Controller for Two Families of Plants	300	(1)
AI Ratio for the Parameterized Controller for Two Families of Plants	300	(1)
Automatic Synthesis of Parameterized Topologies for Circuits	301	(40)
Five New Techniques	301	(5)
New NODE Function for Connecting Distant Points	302	(1)
Symmetry-Breaking Procedure using Geometric Coordinates	303	(1)
Depth-First Evaluation	304	(1)
New Two_Lead Function for Inserting Two-Leaded Components	305	(1)
New Q Transistor-Creating Function	305	(1)
Zobel Network with Two Free Variables	306	(6)
Preparatory Steps for the Zobel Network Problem with Two Free Variables	307	(1)
Initial Circuit	307	(1)
Program Architecture	307	(1)
Function Set	307	(1)
Terminal Set	308	(1)
Fitness Measure	309	(1)
Control Parameters	310	(1)
Results for the Zobel Network Problem with Two Free Variables	310	(1)
Routineness of the Transition from a Problem Involving a Non-Parameterized Circuit to a Problem Involving a Parameterized Circuit	311	(1)
AI Ratio for the Zobel Network Problem with Two Free Variables	312	(1)
Third-Order Elliptic Lowpass Filter with a Free Variable for the Modular Angle	312	(12)
Preparatory Steps for the Third-Order Elliptic Lowpass Filter with a Free Variable for the Modular Angle	313	(1)
Initial Circuit	313	(1)
Program Architecture	314	(1)
Function Set	314	(1)
Terminal Set	314	(1)
Fitness Measure	315	(3)
Control Parameters	318	(1)
Results for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle	318	(6)
Routineness for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle	324	(1)
AI Ratio for the Lowpass Third-Order Elliptic Filter with a Free Variable for the Modular Angle	324	(1)
Passive Lowpass Filter with a Free Variable for the Passband Boundary	324	(8)
Preparatory Steps for the Passive Lowpass Filter with a Free Variable for the Passband Boundary	325	(1)
Initial Circuit	325	(1)
Program Architecture	325	(1)
Terminal Set	325	(1)
Function Set	326	(1)
Fitness Measure	326	(2)
Control Parameters	328	(1)
Results for the Passive Lowpass Filter with a Free Variable for the Passband Boundary	328	(3)
Routineness for the Passive Lowpass Filter with a Free Variable for the Passband Boundary	331	(1)
AI Ratio for the Passive Lowpass Filter with a Free Variable for the Passband Boundary	332	(1)
Active Lowpass Filter with a Free Variable for the Passband Boundary	332	(9)
Preparatory Steps for the Active Lowpass Filter with a Free Variable for the Passband Boundary	333	(1)
Initial Circuit	333	(1)
Program Architecture	333	(1)
Function Set	333	(1)
Terminal Set	334	(1)
Fitness Measure	335	(1)
Control Parameters	335	(1)
Results for the Active Lowpass Filter with a Free Variable for the Passband Boundary	335	(4)
Routineness for the Active Lowpass Filter with a Free Variable for the Passband Boundary	339	(1)
AI Ratio for the Active Lowpass Filter with a Free Variable for the Passband Boundary	339	(2)
Automatic Synthesis of Parameterized Topologies with Conditional Developmental Operators for Circuits	341	(26)
Lowpass/Highpass Filter Circuit	342	(6)
Preparatory Steps for the Lowpass/Highpass Filter	342	(1)
Initial Circuit	342	(1)
Program Architecture	343	(1)
Terminal Set	343	(1)
Function Set	343	(1)
Fitness Measure	343	(1)
Control Parameters	344	(1)
Results for the Lowpass/Highpass Filter	344	(4)
Routineness of the Transition from a Parameterized Topology Problem without Conditional Developmental Operators to a Problem with Conditional Developmental Operators	348	(1)
AI Ratio for the Lowpass/Highpass Filter Problem	348	(1)
Lowpass/Highpass Filter with Variable Passband Boundary	348	(10)
Preparatory Steps for the Lowpass/Highpass Filter with Variable Passband Boundary	349	(1)
Fitness Measure	349	(1)
Results for the Lowpass/Highpass Filter with a Variable Passband Boundary	350	(7)
Routineness for the Lowpass/Highpass Filter with a Variable Passband Boundary	357	(1)
AI Ratio for the Lowpass/Highpass Filter with a Variable Passband Boundary	357	(1)
Quadratic/Cubic Computational Circuit	358	(6)
Preparatory Steps for the Quadratic/Cubic Computational Circuit	358	(1)
Initial Circuit	358	(1)
Program Architecture	358	(1)
Function Set	358	(1)
Terminal Set	359	(1)
Fitness Measure	359	(1)
Control Parameters	360	(1)
Results for the Quadratic/Cubic Computational Circuit	360	(4)
A 40/60dB Amplifier	364	(3)
Preparatory Steps for the 40/60dB Amplifier	364	(1)
Initial Circuit	365	(1)
Terminal Set	365	(1)
Fitness Measure	365	(1)
Control Parameters	366	(1)
Results for 40/60dB Amplifier	366	(1)
Automatic Synthesis of Improved Tuning Rules for PID Controllers	367	(20)
Test Bed of Plants	371	(3)
Preparatory Steps for Improved PID Tuning Rules	374	(2)
Program Architecture	375	(1)
Terminal Set	375	(1)
Function Set	375	(1)
Fitness Measure	375	(1)
Control Parameters	376	(1)
Results for Improved PID Tuning Rules	376	(6)
Human-Competitiveness of the Results for the Improved PID Tuning Rules	382	(3)
Routineness of the Transition from Problems Involving Parameterized Topologies for Controllers to a Problem Involving PID Tuning Rules	385	(1)
AI Ratio for the Improved PID Tuning Rules	385	(2)
Automatic Synthesis of Parameterized Topologies for Improved Controllers	387	(26)
Preparatory Steps for Improved General-Purpose Controllers	387	(3)
Function Set	388	(1)
Terminal Set	388	(1)
Program Architecture	389	(1)
Fitness Measure	389	(1)
Control Parameters	390	(1)
Results for Improved General-Purpose Controllers	390	(21)
Results for First Run for Improved General-Purpose Controllers	390	(8)
Results for Second Run for Improved General-Purpose Controllers	398	(4)
Results for Third Run for Improved General-Purpose Controllers	402	(9)
Human-Competitiveness of the Results for the Improved General-Purpose Controllers	411	(1)
Routineness for the Improved General-Purpose Controllers	412	(1)
AI Ratio for the Improved General-Purpose Controllers	412	(1)
Reinvention of Negative Feedback	413	(8)
Genetic Programming Takes a Ride on the Lackawanna Ferry	414	(1)
Fitness Measure	414	(1)
Initial Circuit, Function Set, Terminal Set, and Control Parameters	415	(1)
Results for the Problem of Reducing Amplifier Distortion	415	(3)
Human-Competitiveness of the Result for the Problem of Reducing Amplifier Distortion	418	(1)
Routineness for the Problem of Reducing Amplifier Distortion	419	(1)
AI Ratio for the Problem of Reducing Amplifier Distortion	419	(2)
Automated Reinvention of Six Post-2000 Patented Circuits	421	(62)
The Six Circuits	423	(3)
Low-Voltage Balun Circuit	423	(1)
Mixed Analog-Digital Variable Capacitor	423	(1)
Voltage-Current Conversion Circuit	423	(1)
Low-Voltage High-Current Transistor Circuit	424	(1)
Cubic Function Generator	424	(2)
Tunable Integrated Active Filter	426	(1)
Uniformity of Treatment of the Six Problems	426	(2)
Preparatory Steps for the Six Post-2000 Patented Circuits	428	(16)
Initial Circuit	428	(1)
Test Fixture for the Low Voltage Balun Circuit	428	(1)
Test Fixture for the Mixed Analog-Digital Variable Capacitor Circuit	429	(1)
Test Fixture for High-Current Load Circuit	430	(1)
Test Fixture for the Voltage-Current Conversion Circuit	431	(1)
Test Fixture for the Cubic Function Generator	432	(1)
Test Fixture for the Tunable Integrated Active Filter	432	(1)
Program Architecture	433	(1)
Function Set	433	(1)
Terminal Set	434	(1)
Fitness Measure	435	(1)
Fitness Measure for Low Voltage Balun Circuit	436	(1)
Fitness Measure for Mixed Analog-Digital Variable Capacitor	437	(3)
Fitness Measure for High-Current Load Circuit	440	(1)
Fitness Measure for Voltage-Current Conversion Circuit	441	(1)
Fitness Measure for Cubic Function Generator	442	(1)
Fitness Measure for Tunable Integrated Active Filter	442	(2)
Control Parameters	444	(1)
Results for the Six Post-2000 Patented Circuits	444	(34)
Results for Low-Voltage Balun Circuit	444	(7)
Results for Mixed Analog-Digital Variable Capacitor	451	(3)
Results for High-Current Load Circuit	454	(1)
Results for First Run of High-Current Load Circuit	454	(3)
Results for Second Run of High-Current Load Circuit	457	(1)
Results for Voltage-Current Conversion Circuit	458	(3)
Results for Cubic Function Generator	461	(1)
Results for First Run of Cubic Function Generator	461	(3)
Results for Second Run of Cubic Function Generator	464	(2)
Tunable Integrated Active Filter	466	(1)
Results for First Run of Tunable Integrated Active Filter	466	(3)
Results for Second Run of Tunable Integrated Active Filter	469	(4)
Results of Third Run of Tunable Integrated Active Filter	473	(3)
Results of Fourth Run of Tunable Integrated Active Filter	476	(2)
Commercial Practicality of Genetic Programming for Automated Circuit Synthesis	478	(3)
Human-Competitiveness of the Results for the Six Post-2000 Patented Circuits	481	(1)
Routineness for the Six Post-2000 Patented Circuits	481	(1)
AI Ratio for the Six Post-2000 Patented Circuits	482	(1)
Problems for Which Genetic Programming May Be Well Suited	483	(32)
Characteristics Suggesting the Use of the Genetic Algorithm	483	(1)
Characteristics Suggesting the Use of Genetic Programming	484	(21)
Discovering the Size and Shape of the Solution	484	(2)
Reuse of Substructures	486	(9)
The Number of Substructures	495	(1)
Hierarchical References among the Substructures	496	(1)
Passing Parameters to Substructures	497	(2)
Type of Substructures	499	(1)
Number of Arguments Possessed by Substructures	500	(1)
The Developmental Process	500	(4)
Parameterized Topologies Containing Free Variables	504	(1)
Characteristics Suggesting the Use of Genetic Methods	505	(10)
Non-Greedy Nature of Genetic Methods	505	(1)
Recombination in Conjunction with the Population in Genetic Methods	506	(1)
The Changing Mix of Schemata	507	(3)
Viewing Mutation and Crossover in a Common Framework	510	(1)
Taking Advantage of the Information Stored in the Population in Allocating Future Trials	511	(4)
Parallel Implementation and Computer Time	515	(8)
Computer Systems Used for Work in This Book	516	(2)
Alpha Parallel Computer System	516	(1)
Pentium Parallel Computer System	517	(1)
Computer Time for Problems in This Book	518	(5)
Historical Perspective on Moore's Law and the Progression of Qualitatively More Substantial Results Produced by Genetic Programming	523	(6)
Five Computer Systems Used in 15-Year Period	523	(1)
Qualitative Nature of Results Produced by the Five Computer Systems	524	(2)
Effect of Order-of-Magnitude Increases in Computer Power on the Qualitative Nature of the Results Produced by Genetic Programming	526	(3)
Conclusion	529	(4)
Genetic Programming Now Routinely Delivers High-Return Human-Competitive Machine Intelligence	529	(1)
Genetic Programming Is an Automated Invention Machine	530	(1)
Genetic Programming Can Automatically Create Parameterized Topologies	530	(1)
Genetic Programming Has Delivered Qualitatively More Substantial Results in Synchrony with Increasing Computer Power	531	(2)
Appendix A: Functions and Terminals	533	(6)
Appendix B: Control Parameters	539	(12)
Appendix C: Patented or Patentable Inventions Generated by Genetic Programming	551	(4)
Bibliography	555	(20)
Index	575