Preface | |
Evolvable Hardware and GA | |
Automated design synthesis and partitioning for adaptive reconfigurable hardware | p. 3 |
High-performance hardware design and implementation of genetic algorithms | p. 53 |
Fuzzy Logic Hardware Implementations | |
Hardware implementation of intelligent systems | p. 91 |
High performance fuzzy processors | p. 121 |
A digital fuzzy processor for fuzzy-rule-based systems | p. 147 |
Neural Networks Hardware Implementations | |
Optimum multiuser detection for CDMA system using the mean field annealing neural network | p. 167 |
Analog VLSI hardware implementation of a supervised learning algorithm | p. 193 |
pRAM: the probabilistic RAM neural processor | p. 219 |
Algorithms for Parallel Machines | |
Parallel subgraph matching on a hierarchical interconnection network | p. 245 |
About the editors | p. 277 |
Index of terms | p. 281 |
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