Invited Talks | |
Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless | p. 1 |
Scaling Commercial Verification to Larger Systems | p. 8 |
From Hardware Verification to Software Verification: Re-use and Re-learn | p. 14 |
Where Do Bugs Come from? (Abstract) | p. 16 |
HVC Award | |
Symbolic Execution and Model Checking for Testing | p. 17 |
Hardware Verification | |
On the Characterization of Until as a Fixed Point Under Clocked Semantics | p. 19 |
Reactivity in SystemC Transaction-Level Models | p. 34 |
Model Checking | |
Verifying Parametrised Hardware Designs Via Counter Automata | p. 51 |
How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison | p. 69 |
Dynamic Hardware Verification | |
Constraint Patterns and Search Procedures for CP-Based Random Test Generation | p. 86 |
Using Virtual Coverage to Hit Hard-To-Reach Events | p. 104 |
Merging Formal and Testing | |
Test Case Generation for Ultimately Periodic Paths | p. 120 |
Dynamic Testing Via Automata Learning | p. 136 |
Formal Verification for Software | |
On the Architecture of System Verification Environments | p. 153 |
Exploiting Shared Structure in Software Verification Conditions | p. 169 |
Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code | p. 185 |
A Complete Bounded Model Checking Algorithm for Pushdown Systems | p. 202 |
Software Testing | |
Locating Regression Bugs | p. 218 |
The Advantages of Post-Link Code Coverage | p. 235 |
GenUTest: A Unit Test and Mock Aspect Generation Tool | p. 252 |
Author Index | p. 267 |
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