Introduction to Logic Design

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  • Edition: 3rd
  • Format: Hardcover
  • Copyright: 2009-01-09
  • Publisher: McGraw-Hill Education

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Introduction to Logic Design, Third Edition by Alan Marcovitz-the student's companion to logic design! A clear presentation of fundamentals and well-paced writing style make this the ideal companion to any first course in digital logic. An extensive set of examples-well integrated into the body of the text and included at the end of each chapter in sections of solved problems-gives students multiple opportunities to understand the topics being presented.

Table of Contents

Prefacep. ix
Introductionp. 1
Logic Designp. 1
The Laboratoryp. 3
A Brief Review of Number Systemsp. 4
Hexadecimalp. 8
Binary Additionp. 9
Signed Numbersp. 11
Binary Subtractionp. 14
Binary Coded Decimal (BCD)p. 16
Other Codesp. 17
Solved Problemsp. 19
Exercisesp. 25
Chapter 1 Testp. 27
Combinational Systemsp. 29
The Design Process for Combinational Systemsp. 29
Don't Care Conditionsp. 32
The Development of Truth Tablesp. 33
Switching Algebrap. 37
Definition of Switching Algebrap. 38
Basic Properties of Switching Algebrap. 40
Manipulation of Algebraic Functionsp. 43
Implementation of Functions with AND, OR, and NOT Gatesp. 48
The Complementp. 52
From the Truth Table to Algebraic Expressionsp. 54
NAND, NOR, and Exclusive-OR Gatesp. 59
Simplification of Algebraic Expressionsp. 65
Manipulation of Algebraic Functions and NAND Gate Implementationsp. 70
A More General Boolean Algebrap. 78
Solved Problemsp. 80
Exercisesp. 100
Chapter 2 Testp. 108
The Karnaugh Mapp. 111
Introduction to the Karnaugh Mapp. 111
Minimum Sum of Product Expressions Using the Karnaugh Mapp. 121
Don't Caresp. 135
Product of Sumsp. 140
Five- and Six-Variable Mapsp. 143
Multiple Output Problemsp. 150
Solved Problemsp. 162
Exercisesp. 191
Chapter 3 Testp. 196
Function Minimization Algorithmsp. 201
Quine-McCluskey Method for One Outputp. 201
Iterated Consensus for One Outputp. 204
Prime Implicant Tables for One Outputp. 208
Quine-McCluskey for Multiple Output Problemsp. 216
Iterated Consensus for Multiple Output Problemsp. 219
Prime Implicant Tables for Multiple Output Problemsp. 222
Solved Problemsp. 226
Exercisesp. 246
Chapter 4 Testp. 247
Designing Combinational Systemsp. 249
Iterative Systemsp. 250
Delay in Combinational Logic Circuitsp. 250
Addersp. 252
Subtractors and Adder/Subtractorsp. 256
Comparatorsp. 256
Binary Decodersp. 258
Encoders and Priority Encodersp. 268
Multiplexers and Demultiplexersp. 269
Three-State Gatesp. 274
Gate Arrays-ROMs, PLAs, and PALsp. 276
Designing with Read-Only Memoriesp. 280
Designing with Programmable Logic Arraysp. 281
Designing with Programmable Array Logicp. 284
Testing and Simulation of Combinational Systemsp. 289
An Introduction to Verilogp. 289
Larger Examplesp. 292
A One-Digit Decimal Adderp. 292
A Driver for a Seven-Segment Displayp. 293
An Error Coding Systemp. 301
Solved Problemsp. 305
Exercisesp. 348
Chapter 5 Testp. 360
Analysis of Sequential Systemsp. 365
State Tables and Diagramsp. 366
Latchesp. 370
Flip Flopsp. 371
Analysis of Sequential Systemsp. 380
Solved Problemsp. 390
Exercisesp. 403
Chapter 6 Testp. 412
The Design of Sequential Systemsp. 415
Flip Flop Design Techniquesp. 420
The Design of Synchronous Countersp. 437
Design of Asynchronous Countersp. 447
Derivation of State Tables and State Diagramsp. 450
Solved Problemsp. 465
Exercisesp. 483
Chapter 7 Testp. 491
Solving Larger Sequential Problemsp. 493
Shift Registersp. 493
Countersp. 499
Programmable Logic Devices (PLDs)p. 506
Design Using ASM Diagramsp. 511
One-Hot Encodingp. 515
Verilog for Sequential Systemsp. 516
Design of a Very Simple Computerp. 518
Other Complex Examplesp. 520
Solved Problemsp. 527
Exercisesp. 537
Chapter 8 Testp. 541
Simplification of Sequential Circuits
View Chapter 9 at http://www.mhhe.com/marcovitz
A Tabular Method for State Reductionp. 3
Partitionsp. 10
Properties of Partitionsp. 13
Finding SP Partitionsp. 14
State Reduction using Partitionsp. 17
Choosing a State Assignmentp. 22
Solved Problemsp. 28
Exercisesp. 44
Chapter 9 Testp. 48
Relating the Algebra to the Karnaugh Mapp. 543
Answers to Selected Exercisesp. 548
Chapter Test Answersp. 573
Laboratory Experimentsp. 587
Hardware Logic Labp. 587
WinBreadboard™ and MacBreadboardTMp. 591
Introduction to LogicWorksp. 593
A Set of Logic Design Experimentsp. 598
Experiments Based on Chapter 2 Materialp. 598
Experiments Based on Chapter 5 Materialp. 600
Experiments Based on Chapter 6 Materialp. 603
Experiments Based on Chapter 7 Materialp. 605
Experiments Based on Chapter 8 Materialp. 606
Layout of Chips Referenced in the Text and Experimentsp. 607
Complete Examplesp. 612
Indexp. 629
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