Introduction to Logic Design

by Marcovitz, Alan

• ISBN13: 9780073191645
• ISBN10: 0073191647
• Edition: 3rd
• Format: Hardcover
• Copyright: 2009-01-09
• Publisher: McGraw-Hill Education

Summary

Introduction to Logic Design, Third Edition by Alan Marcovitz-the student's companion to logic design! A clear presentation of fundamentals and well-paced writing style make this the ideal companion to any first course in digital logic. An extensive set of examples-well integrated into the body of the text and included at the end of each chapter in sections of solved problems-gives students multiple opportunities to understand the topics being presented.

Table of Contents

Preface	p. ix
Introduction	p. 1
Logic Design	p. 1
The Laboratory	p. 3
A Brief Review of Number Systems	p. 4
Hexadecimal	p. 8
Binary Addition	p. 9
Signed Numbers	p. 11
Binary Subtraction	p. 14
Binary Coded Decimal (BCD)	p. 16
Other Codes	p. 17
Solved Problems	p. 19
Exercises	p. 25
Chapter 1 Test	p. 27
Combinational Systems	p. 29
The Design Process for Combinational Systems	p. 29
Don't Care Conditions	p. 32
The Development of Truth Tables	p. 33
Switching Algebra	p. 37
Definition of Switching Algebra	p. 38
Basic Properties of Switching Algebra	p. 40
Manipulation of Algebraic Functions	p. 43
Implementation of Functions with AND, OR, and NOT Gates	p. 48
The Complement	p. 52
From the Truth Table to Algebraic Expressions	p. 54
NAND, NOR, and Exclusive-OR Gates	p. 59
Simplification of Algebraic Expressions	p. 65
Manipulation of Algebraic Functions and NAND Gate Implementations	p. 70
A More General Boolean Algebra	p. 78
Solved Problems	p. 80
Exercises	p. 100
Chapter 2 Test	p. 108
The Karnaugh Map	p. 111
Introduction to the Karnaugh Map	p. 111
Minimum Sum of Product Expressions Using the Karnaugh Map	p. 121
Don't Cares	p. 135
Product of Sums	p. 140
Five- and Six-Variable Maps	p. 143
Multiple Output Problems	p. 150
Solved Problems	p. 162
Exercises	p. 191
Chapter 3 Test	p. 196
Function Minimization Algorithms	p. 201
Quine-McCluskey Method for One Output	p. 201
Iterated Consensus for One Output	p. 204
Prime Implicant Tables for One Output	p. 208
Quine-McCluskey for Multiple Output Problems	p. 216
Iterated Consensus for Multiple Output Problems	p. 219
Prime Implicant Tables for Multiple Output Problems	p. 222
Solved Problems	p. 226
Exercises	p. 246
Chapter 4 Test	p. 247
Designing Combinational Systems	p. 249
Iterative Systems	p. 250
Delay in Combinational Logic Circuits	p. 250
Adders	p. 252
Subtractors and Adder/Subtractors	p. 256
Comparators	p. 256
Binary Decoders	p. 258
Encoders and Priority Encoders	p. 268
Multiplexers and Demultiplexers	p. 269
Three-State Gates	p. 274
Gate Arrays-ROMs, PLAs, and PALs	p. 276
Designing with Read-Only Memories	p. 280
Designing with Programmable Logic Arrays	p. 281
Designing with Programmable Array Logic	p. 284
Testing and Simulation of Combinational Systems	p. 289
An Introduction to Verilog	p. 289
Larger Examples	p. 292
A One-Digit Decimal Adder	p. 292
A Driver for a Seven-Segment Display	p. 293
An Error Coding System	p. 301
Solved Problems	p. 305
Exercises	p. 348
Chapter 5 Test	p. 360
Analysis of Sequential Systems	p. 365
State Tables and Diagrams	p. 366
Latches	p. 370
Flip Flops	p. 371
Analysis of Sequential Systems	p. 380
Solved Problems	p. 390
Exercises	p. 403
Chapter 6 Test	p. 412
The Design of Sequential Systems	p. 415
Flip Flop Design Techniques	p. 420
The Design of Synchronous Counters	p. 437
Design of Asynchronous Counters	p. 447
Derivation of State Tables and State Diagrams	p. 450
Solved Problems	p. 465
Exercises	p. 483
Chapter 7 Test	p. 491
Solving Larger Sequential Problems	p. 493
Shift Registers	p. 493
Counters	p. 499
Programmable Logic Devices (PLDs)	p. 506
Design Using ASM Diagrams	p. 511
One-Hot Encoding	p. 515
Verilog for Sequential Systems	p. 516
Design of a Very Simple Computer	p. 518
Other Complex Examples	p. 520
Solved Problems	p. 527
Exercises	p. 537
Chapter 8 Test	p. 541
Simplification of Sequential Circuits
View Chapter 9 at http://www.mhhe.com/marcovitz
A Tabular Method for State Reduction	p. 3
Partitions	p. 10
Properties of Partitions	p. 13
Finding SP Partitions	p. 14
State Reduction using Partitions	p. 17
Choosing a State Assignment	p. 22
Solved Problems	p. 28
Exercises	p. 44
Chapter 9 Test	p. 48
Relating the Algebra to the Karnaugh Map	p. 543
Answers to Selected Exercises	p. 548
Chapter Test Answers	p. 573
Laboratory Experiments	p. 587
Hardware Logic Lab	p. 587
WinBreadboard™ and MacBreadboardTM	p. 591
Introduction to LogicWorks	p. 593
A Set of Logic Design Experiments	p. 598
Experiments Based on Chapter 2 Material	p. 598
Experiments Based on Chapter 5 Material	p. 600
Experiments Based on Chapter 6 Material	p. 603
Experiments Based on Chapter 7 Material	p. 605
Experiments Based on Chapter 8 Material	p. 606
Layout of Chips Referenced in the Text and Experiments	p. 607
Complete Examples	p. 612
Index	p. 629
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