Logic Synthesis and Verification

by Hassoun, Soha; Sasao, Tsutomu; Brayton, Robert K.

• ISBN13: 9780792376064
• ISBN10: 0792376064
• Format: Hardcover
• Copyright: 2001-11-01
• Publisher: Kluwer Academic Pub

Summary

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this book are technical strength and comprehensiveness. The book chapters are written by twenty-eight recognized leaders in the field and reviewed by equally qualified experts. The topics collectively span the field. Logic Synthesis and Verification fills a current gap in the existing CAD literature. Each chapter contains essential information to study a topic at a great depth, and to understand further developments in the field. The book is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools. From the foreword: "The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book. Their innovative work contributed to design automation tools that permanently changed the course of electronic design." by Aart J. de Geus, Chairman and CEO, Synopsys, Inc.

Table of Contents

Foreword	ix
Preface	xi
Two-Level Logic Minimization	1	(28)
Oliver Coudert
Tsutomu Sasao
Introduction	1	(1)
Exact Logic Minimization	2	(10)
Heuristic Logic Minimization	12	(9)
Conclusion	21	(8)
Multi-Level Logic Optimization	29	(36)
Masahiro Fujita
Yusuke Matsunaga
Maciej Ciesielski
Introduction	29	(2)
Algebraic Methods	31	(9)
Boolean Methods	40	(10)
Functional Decomposition	50	(10)
Conclusions and Perspectives	60	(1)
Acknowledgments	61	(4)
Flexibility in Logic	65	(24)
Ellen Sentovich
Daniel Brand
Introduction	65	(2)
Environment	67	(4)
Types of Flexibility	71	(13)
Historical Perspective	84	(5)
Multiple-Valued Logic Synthesis and Optimization	89	(26)
Elena Dubrova
Introduction	89	(1)
Multiple-Valued Functions	90	(1)
Functional Completeness	91	(5)
Chain-Based Post Algebra	96	(2)
Representations of Multiple-Valued Functions	98	(3)
Two-Level Logic Optimization	101	(3)
Multi-Level Logic Optimization	104	(6)
Summary	110	(1)
Historical Perspectives	111	(4)
Technology Mapping	115	(320)
Leon Stok
Vivek Tiwari
Introduction	115	(2)
Decomposition	117	(3)
Pattern Matching	120	(1)
Covering	121	(309)
BDDs	430	(1)
Equivalence Checking	431	(4)
Appendices	435	(12)
Appendix A: About the Authors	435	(8)
Appendix B: Author Contact Information	443	(4)
Index	447