Low-Energy Fpgas

by George, Varghese; Rabaey, Jan M.

• ISBN13: 9780792374282
• ISBN10: 0792374282
• Format: Hardcover
• Copyright: 2001-06-01
• Publisher: Kluwer Academic Pub

Summary

Low-Energy FPGAs: Architecture and Design is a primary resource for both researchers and practicing engineers in the field of digital circuit design. The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon. Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.

Table of Contents

Preface	1	(4)
Introduction	5	(22)
Introduction	5	(1)
FPGA	6	(1)
Interconnect Architecture	7	(4)
Logic Block Architecture	11	(2)
Programming Technology	13	(4)
Computation Model	17	(2)
FPGA as a Performance Accelerator	19	(1)
Research Projects	20	(4)
FPGA and Energy Consumption	24	(1)
Conclusion	25	(2)
Power Dissipation in FPGAS	27	(16)
Introduction	27	(1)
Technology and Power	27	(5)
Impact of Power Dissipation	32	(2)
Components of Power	34	(4)
Clock Energy	38	(2)
Conclusion	40	(3)
Exploration Environment	43	(26)
Introduction	43	(1)
Related Research	43	(1)
Evaluation Flow	44	(2)
Mapping	46	(1)
Architecture Representation	47	(3)
Placement	50	(5)
Routing	55	(11)
Extraction	66	(1)
Conclusion	67	(2)
Logic and Interconnect Architecture	69	(26)
Introduction	69	(1)
Related Research	69	(2)
Energy-Delay Components	71	(3)
Architectural Components	74	(1)
Logic Block	75	(6)
Goal of Interconnect Optimization	81	(2)
Interconnect Architecture	83	(9)
Conclusion	92	(3)
Circuit Techniques	95	(16)
Introduction	95	(1)
Related Work	95	(1)
Energy-Delay Design Space	96	(2)
Low-Swing Signaling	98	(3)
Low-Swing Circuit	101	(4)
Clock Distribution	105	(5)
Conclusion	110	(1)
Configuration Energy	111	(16)
Introduction	111	(1)
Configuration Cost	111	(1)
Configuration Techniques	112	(3)
Shift Register Versus Random Access	115	(3)
Configuration Energy Components	118	(1)
Methods to Reduce Configuration Energy	119	(5)
Conclusion	124	(3)
Hardware Implementation	127	(24)
Introduction	127	(1)
Logic Block	127	(4)
Interconnect	131	(6)
Tile Layout	137	(2)
Configuration Architecture	139	(3)
Final Layout	142	(1)
FPGA as an Embedded Unit	143	(6)
Conclusion	149	(2)
Results	151	(12)
Introduction	151	(1)
Measurement Setup	151	(2)
Measurement Strategy	153	(1)
Measured Data	154	(7)
Conclusion	161	(2)
Conclusion	163	(8)
FPGA: The Evolution	163	(1)
Energy Efficiency	163	(1)
This Work	164	(4)
Looking Ahead	168	(3)
Bibliography	171	(8)
Index	179