Memory Issues in Embedded Systems-On-Chip

by Panda, Preeti Ranjan; Dutt, Nikil D.; Nicolau, Alexandru

• ISBN13: 9780792383628
• ISBN10: 0792383621
• Format: Hardcover
• Copyright: 1998-10-01
• Publisher: Kluwer Academic Pub

Summary

Memory Issues in Embedded Systems-On-Chip: Optimizations and Explorations is designed for different groups in the embedded systems-on-chip arena. First, it is designed for researchers and graduate students who wish to understand the research issues involved in memory system optimization and exploration for embedded systems-on-chip. Second, it is intended for designers of embedded systems who are migrating from a traditional micro-controllers centered, board-based design methodology to newer design methodologies using IP blocks for processor-core-based embedded systems-on-chip. Also, since Memory Issues in Embedded Systems-on-Chip: Optimization and Explorations illustrates a methodology for optimizing and exploring the memory configuration of embedded systems-on-chip, it is intended for managers and system designers who may be interested in the emerging capabilities of embedded systems-on-chip design methodologies for memory-intensive applications.

Table of Contents

List of Figures	vii	(6)
List of Tables	xiii	(2)
Preface	xv	(4)
Acknowledgments	xix
1. INTRODUCTION	1	(8)
1.1 Embedded Systems-on-Chip Design	1	(2)
1.2 Synthesis, Compilation and Architecture for Embedded SOC	3	(1)
1.3 Embedded System Architecture	4	(2)
1.4 Organization of the Book	6	(3)
2. BACKGROUND	9	(14)
2.1 Introduction	9	(1)
2.2 Exploiting Memory Hierarchy	10	(9)
2.3 Memory Issues in Embedded Systems	19	(3)
2.4 In this book	22	(1)
3. OFF-CHIP MEMORY ACCESS OPTIMIZATIONS	23	(50)
3.1 Incorporating Off-chip Memory Accesses into Synthesis	24	(28)
3.2 Power Optimizations in Memory Accesses	52	(19)
3.3 Summary	71	(2)
4. DATA ORGANIZATION: THE PROCESSOR CORE/CACHE INTERFACE	73	(44)
4.1 Introduction	73	(2)
4.2 Memory Data Organization	75	(22)
4.3 Data Alignment for Loop Blocking	97	(18)
4.4 Summary	115	(2)
5. ON-CHIP VS. OFF-CHIP MEMORY: UTILIZING SCRATCH-PAD MEMORY	117	(20)
5.1 Scratch-Pad Memory	117	(2)
5.2 Problem Description	119	(3)
5.3 The Partitioning Strategy	122	(6)
5.4 Context Switching	128	(2)
5.5 Generalized Memory Hierarchy	130	(1)
5.6 Experiments	131	(5)
5.7 Summary	136	(1)
6. MEMORY ARCHITECTURE EXPLORATION	137	(18)
6.1 Motivation	137	(1)
6.2 Illustrative Example	138	(2)
6.3 Exploration Strategy	140	(1)
6.4 Memory Performance Estimation	141	(7)
6.5 Experiments	148	(5)
6.6 Summary	153	(2)
7. CASE STUDY: MPEG DECODER	155	(14)
7.1 Overview of MPEG Decoder	156	(1)
7.2 Memory Exploration of Sample Routines	156	(5)
7.3 Memory Exploration of MPEG Decoder	161	(7)
7.4 Summary	168	(1)
8. CONCLUSIONS	169	(6)
8.1 Extending this Work	170	(2)
8.2 Future Directions	172	(3)
References	175	(12)
Index	187