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9780750657969

Practical Data Acquisition for Instrumentation and Control Systems

by ;
  • ISBN13:

    9780750657969

  • ISBN10:

    0750657960

  • Format: Paperback
  • Copyright: 2003-07-28
  • Publisher: Elsevier Science
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Summary

* Covers all aspects of the data acquisition system from design and specification to programming, installation and configuration * Gives both the novice and experienced user a solid understanding of interfacing the PC and standalone instruments to real-world signals from the laboratory to the industrial plant * Provides a thorough grasp of PC data acquisition systems and the ability to design, specify, install and configure and program data acquisition systems quickly and effectively This book focuses on data acquisition and control using the PC and standalone instruments. The PC has made a dramatic impact in the ease with which the technician, scientist and engineer today can set up their own test and measurement system at a remarkably low cost. And this book aims to show you how easy it is with plenty of carefully researched information. The popular IEEE 488 interface is also covered. All aspects of the data acquisition system are included from design and specification to programming, installation and configuration. This book gives both the novice and experienced user a solid grasp of the principles and practical implementation of interfacing the PC and standalone instruments to real-world signals from the laboratory to the industrial plant. Once you have read the book, you will have a thorough grasp of PC data acquisition systems and will be able to design, specify, install and configure and program data acquisition systems quickly and effectively.

Table of Contents

Preface xvii
Introduction
1(12)
Definition of data acquisition and control
1(1)
Fundamentals of data acquisition
2(4)
Transducers and sensors
3(1)
Field wiring and communications cabling
3(1)
Signal conditioning
3(1)
Data acquisition hardware
4(1)
Data acquisition software
5(1)
Host computer
5(1)
Data acquisition and control system configuration
6(7)
Computer plug-in I/O
7(1)
Distributed I/O
8(1)
Stand-alone or distributed loggers/controllers
9(2)
IEEE 488 (GPIB) remote programmable instruments
11(2)
Analog and digital signals
13(23)
Classification of signals
13(4)
Digital signals binary signals
14(1)
Analog signals
15(2)
Sensors and transducers
17(1)
Transducer characteristics
17(2)
Resistance temperature detectors (RTDs)
19(3)
Characteristics of RTDs
19(1)
Linearity of RTDs
19(1)
Measurement circuits and considerations for RTDs
20(2)
Thermistors
22(1)
Thermocouples
22(6)
Reference junction compensation
23(1)
Isothermal block and compensation cables
24(1)
Thermocouple linearization
24(1)
Thermocouple types and standards
25(1)
Thermocouple construction
26(1)
Measurement errors
26(1)
Wiring configurations
27(1)
Strain gauges
28(1)
Wheatstone bridges
29(7)
General characteristics
29(1)
Quarter bridge configuration
30(1)
Half bridge configuration
31(1)
Full bridge configuration
32(1)
Wiring connections
32(2)
Temperature considerations
34(1)
Measurement errors
34(2)
Signal conditioning
36(31)
Introduction
36(1)
Types of signal conditioning
37(7)
Amplification
37(1)
Isolation
37(1)
Filtering
38(6)
Linearization
44(1)
Classes of signal conditioning
44(4)
Plug-in board signal conditioning
44(1)
Direct connect modular -- two-wire transmitters
45(1)
Distributed I/O -- digital transmitters
46(2)
Field wiring and signal measurement
48(8)
Grounded signal sources
49(1)
Floating signal sources
49(1)
Single-ended measurement
50(1)
Differential measurement
50(1)
Common mode voltages and CMRR
50(2)
Measuring grounded signal sources
52(1)
Ground loops
53(1)
Signal circuit isolation
53(1)
Measuring ungrounded signal sources
54(1)
System isolation
55(1)
Noise and interference
56(5)
Definition of noise and interference
56(1)
Sources and types of noise
56(5)
Minimizing noise
61(3)
Cable shielding and shield earthing
61(1)
Grounding cable shields
62(2)
Shielded and twisted-pair cable
64(3)
Twisted-pair cables
65(1)
Coaxial cables
66(1)
The PC for real time work
67(52)
Introduction
67(1)
Operating systems
67(5)
DOS
68(1)
Microsoft Windows 3.1, 95, 98, 2000 and NT
69(2)
UNIX
71(1)
Operation of interrupts
72(5)
Hardware interrupts
73(1)
Non-maskable interrupts
73(1)
Maskable interrupts
73(1)
Programmable interrupt controller(s)
73(2)
Initialization required for interrupts
75(1)
I/O devices requesting interrupt service
75(1)
Interrupt service routines
76(1)
Sharing interrupts
77(1)
Operation of direct memory access (DMA)
77(6)
DMA controllers
78(1)
Initialization required for DMA control
79(1)
I/O devices requesting DMA
79(1)
Terminal count signal
80(1)
DMA modes
81(2)
Repeat string instructions (REP INSW)
83(1)
Polled data transfer
84(12)
Data transfer speed (polled I/O, interrupt I/O, DMA)
96(1)
Memory
97(2)
Base memory
97(1)
Expanded memory system (EMS)
98(1)
Extended memory (XMS)
99(1)
Expansion memory hardware
99(1)
Expansion bus standards (ISA, EISA, PCI, and PXI bus)
99(13)
ISA bus
99(9)
Microchannel bus
108(1)
EISA bus
108(1)
The PCI, compactPCI and PXI bus
109(3)
Serial communications
112(1)
Standard settings
112(1)
Intelligent serial ports
112(1)
Interfacing techniques to the IBM PC
113(6)
Hardware considerations
114(1)
Address decoding
115(1)
Timing requirements
116(3)
Plug-in data acquisition boards
119(57)
Introduction
119(1)
A/D Boards
120(18)
Multiplexers
120(1)
Input signal amplifier
121(2)
Channel-gain arrays
123(1)
Sample and hold circuits
123(1)
A/D converters
124(12)
Memory (FIFO) buffer
136(1)
Timing circuitry
136(1)
Expansion bus interface
137(1)
Single ended vs differential signals
138(3)
Single ended inputs
138(1)
Pseudo-differential configuration
139(1)
Differential inputs
140(1)
Resolution, dynamic range and accuracy of A/D boards
141(2)
Dynamic range
141(1)
Resolution
141(1)
System accuracy
142(1)
Sampling rate and the Nyquist theorem
143(8)
Nyquist's theorem
143(1)
Aliasing
143(3)
Preventing aliasing
146(2)
Practical examples
148(3)
Sampling techniques
151(5)
Continuous channel scanning
151(2)
Simultaneous sampling
153(1)
Block mode operations
154(2)
Speed vs throughput
156(1)
D/A boards
157(7)
Digital to analog converters
158(2)
Parameters of D/A converters
160(2)
Functional characteristics of D/A boards
162(1)
Memory (FIFO) buffer
162(1)
Timing circuitry
163(1)
Output amplifier buffer
163(1)
Expansion bus interface
163(1)
Digital I/O boards
164(2)
Interfacing digital inputs/outputs
166(4)
Switch sensing
166(1)
AC/DC voltage sensing
167(1)
Driving an LED indicator
168(1)
Driving relays
168(2)
Counter/timer I/O boards
170(6)
Serial data communications
176(28)
Definitions and basic principles
176(6)
Transmission modes -- simplex and duplex
177(1)
Coding of messages
178(3)
Format of data communications messages
181(1)
Data transmission speed
182(1)
RS-232-C interface standard
182(9)
Electrical signal characteristics
183(3)
Interface mechanical characteristics
186(1)
Functional description of the interchange circuits
187(1)
The sequence of operation of the EIA-232 interface
188(2)
Examples of RS-232 interfaces
190(1)
Main features of the RS-232 Interface Standard
190(1)
RS-485 interface standard
191(2)
RS-485 repeaters
192(1)
Comparison of the RS-232 and RS-485 standards
193(1)
The 20 mA current loop
194(1)
Serial interface converters
194(1)
Protocols
195(3)
Flow control protocols
196(1)
ASCII-based protocols
196(2)
Error detection
198(2)
Character redundancy checks
199(1)
Block redundancy checks
199(1)
Cyclic redundancy Checks
199(1)
Troubleshooting & testing serial data communication circuits
200(4)
The breakout box
201(1)
Null modem
201(1)
Loop back plug
202(1)
Protocol analyzer
202(1)
The PC as a protocol analyzer
202(2)
Distributed and stand-alone loggers/controllers
204(30)
Introduction
204(1)
Methods of operation
204(5)
Programming and logging data using PCMCIA cards
205(1)
Stand-alone operation
206(1)
Direct connection to the host PC
206(2)
Remote connection to the host PC
208(1)
Stand-alone logger/controller hardware
209(8)
Microprocessors
210(1)
Memory
210(1)
Real time clock
211(1)
Universal asynchronous receiver/transmitter (UART)
212(1)
Power supply
213(1)
Power management circuitry
214(1)
Analog inputs and digital I/O
215(2)
Expansion modules
217(1)
Communications hardware interface
217(3)
RS-232 interface
217(2)
RS-485 standard
219(1)
Communication bottlenecks and system performance
219(1)
Using Ethernet to connect data loggers
220(1)
Stand-alone logger/controller firmware
220(1)
Stand-alone logger/controller software design
221(9)
ASCII based command formats
222(1)
ASCII based data formats
223(1)
Error reporting
223(1)
System commands
224(1)
Channel commands
224(2)
Schedules
226(3)
Alarms
229(1)
Data logging and retrieval
229(1)
Host software
230(1)
Considerations in using standalone logger/controllers
231(1)
Stand-alone logger/controllers vs internal systems
232(2)
Advantages
232(1)
Disadvantages
232(2)
IEEE 488 Standard
234(18)
Introduction
234(1)
Electrical and mechanical characteristics
235(1)
Physical connection configurations
236(1)
Device types
237(1)
Bus structure
238(2)
Data lines
239(1)
Interface management lines
239(1)
Handshake lines
240(1)
GPIB handshaking
240(1)
Device communication
241(2)
GPIB addressing
242(1)
Un-addressing devices
242(1)
Terminating data messages
242(1)
Sending and receiving data
243(1)
IEEE 488.2
243(5)
Requirements of IEEE 488.2 controllers
243(1)
IEEE 488.2 control sequences
244(1)
IEEE 488.2 protocols
244(2)
Device interface capabilities
246(1)
Status reporting model
246(1)
Common command set
247(1)
Standard commands for programmable instruments (SCPI)
248(4)
IEEE 488.2 common commands required by the SCPI
248(1)
SCPI required commands
249(1)
The SCPI programming command model
249(2)
SCPI hierarchical command structure
251(1)
Ethernet & LAN systems
252(19)
Ethernet and fieldbuses for data acquisition
252(1)
Physical layer
253(7)
10Base5 systems
253(3)
10Base2 systems
256(1)
10BaseT
257(1)
10BaseF
258(1)
100 Base-T (100 Base-TX, T4, FX, T2)
258(2)
Medium access control
260(3)
MAC frame format
263(1)
Difference between 802.3 and Ethernet
264(1)
Reducing collisions
265(1)
Ethernet design rules
265(3)
Length of the cable segment
265(1)
Maximum transceiver cable length
266(1)
Node placement rules
266(1)
Maximum transmission path
266(1)
Maximum network size
267(1)
Repeater rules
267(1)
Cable system grounding
268(1)
Fieldbuses
268(3)
The universal serial bus (USB)
271(14)
Introduction
271(1)
USB overall structure
271(6)
Topology
272(1)
Host hubs
273(1)
The connectors (Type A and B)
274(1)
Low-speed cables and high-speed cables
274(1)
External hubs
274(1)
USB devices
275(1)
Host hub controller hardware and driver
275(1)
USB software driver
276(1)
Device drivers
276(1)
Communication flow
276(1)
The physical layer
277(4)
Connectors
278(1)
Cables
278(1)
Signaling
279(1)
NRZI and bit stuffing
280(1)
Power distribution
280(1)
Datalink layer
281(2)
Transfer types
282(1)
Packets and frames
282(1)
Application layer (user layer)
283(1)
Conclusion
283(2)
Acknowledgements
284(1)
Specific techniques
285(7)
Open and closed loop control
285(5)
Definitions
285(1)
Fluid level closed loop control system
286(1)
PID control algorithms
286(2)
Transient performance -- step response
288(1)
Deadband
289(1)
Output limiting
289(1)
Manual control -- bumpless transfer
289(1)
Capturing high speed transient data
290(2)
A/D board operation and memory requirements
290(1)
Trigger modes (pre- and post-triggering)
290(1)
Trigger source and level
290(2)
The PCMCIA Card
292(13)
Introduction
292(1)
History
293(1)
Features
293(2)
Size and Versatility
293(1)
16-Bit
294(1)
Direct memory access (DMA)
294(1)
Multi-functional and transparent
294(1)
Low voltage
294(1)
Plug and play
294(1)
Execute in place
295(1)
Problems
295(1)
Products
295(2)
Memory cards
295(1)
Disk drives
295(1)
Pagers
296(1)
Local area networks
296(1)
Modems
296(1)
Cellular telephone
296(1)
Data acquisition
296(1)
Digital multimeter
296(1)
GPS systems
297(1)
Pocket organizer
297(1)
Stand-alone products
297(1)
Full size computers
297(1)
Construction
297(1)
Size and types
298(1)
Extended types
298(1)
Hardware
298(4)
Power
299(1)
Pin assignments
299(1)
Memory only cards
299(1)
I/O Cards
300(1)
I/O with direct memory access
300(1)
ATA interface (AT attachment)
301(1)
AIMS interface (auto-indexing mass storage)
302(1)
Software
302(1)
PC Card environment
303(1)
PC Card enablers and support software
303(1)
Future
304(1)
Magazine list and PCMCIA address
304(1)
Personal Computer Memory Card International Association
304(1)
Appendix A Glossary
305(27)
Appendix B IBM PC bus specifications
332(17)
B.1 Hardware interrupts
332(1)
B.2 DMA channels
333(1)
B.3 8237 DMA channels
333(1)
Refresh (AT) 08F
334(1)
B.4 8259 interrupt controller
334(2)
B.5 8253 / 8254 counter/timer
336(8)
B.6 Bus signal information
344(2)
B.7 Card dimensions
346(1)
B.8 Centronics interface standard
347(2)
Appendix C Review of the Intel 8255 PPI chip
349(15)
C.1 DIO0CTRL -- control register of the 8255
351(1)
C.2 DIOA -- port A of the 8255 (offset 0, read/write)
352(1)
C.3 DIOB -- port B of the 8255 (offset 1, read/write)
353(1)
C.4 DIOC -- port C of the 8255 (offset 2, read/write)
353(2)
C.5 Mode 0: simple I/O
355(1)
C.6 Mode 0 programming
355(1)
C.7 Mode 1: strobed I/O
355(1)
C.8 Mode 1 programming
356(2)
C.9 Mode 2: strobed bi-directional bus I/O
358(1)
C.10 Mode 2 programming
359(2)
C.11 Single-bit set/reset
361(1)
C.12 Mixed mode programming
361(1)
C.13 8255-2 mode 1 and 2 timing diagrams
362(2)
Appendix D Review of the Intel 8254 timer-counter chip
364(13)
D.1 8254 architecture
364(2)
Count register (CR)
366(1)
Counting element (CE)
366(1)
Output latch (OL)
366(1)
D.2 8254 registers
366(3)
TCCTRL timer/counter control register (offset 3, write only)
366(1)
Configuration mode
367(1)
Read-back command
368(1)
Counter latch command
368(1)
TCO - timer/counter 0 (offset 0, read/write)
369(1)
TC1 - timer/counter 1 (offset 1, read/write)
369(1)
TC2 - timer/counter 2 (offset 2, read/write)
369(1)
D.3 Programming a counter
369(1)
Data transfer format
370(1)
Clock pulse input
370(1)
Gate input
370(1)
D.4 Read operations
370(3)
Simple read operation
371(1)
Counter latch command
371(1)
Read-back command
371(1)
Multiple counter latch
372(1)
Counter status information
372(1)
Latching both status and current count
373(1)
D.5 Counter mode definitions
373(3)
Mode 0: interrupt on terminal count
373(1)
Mode 1: hardware re-triggerable one-shot
374(1)
Mode 2: rate generator
374(1)
Mode 3: square wave generator
374(1)
Mode 4: software-triggered strobe
375(1)
Mode 5: hardware-triggered strobe
375(1)
D.6 Interrupt handling
376(1)
Appendix E Thermocouple tables
377(12)
Type B thermocouple
377(1)
Type BP thermocouple
378(1)
Type BN thermocouple
378(1)
Type E thermocouple
379(1)
Type J thermocouples
380(1)
Type JP thermocouples
380(1)
Type JN thermocouples
381(1)
Type K thermocouples
381(1)
Type KP thermocouple
382(1)
Type KN thermocouple
383(1)
Type R thermocouple
384(1)
Type S thermocouple
385(1)
Type T thermocouple
386(1)
Type TP thermocouple
387(1)
Type TN thermocouple
388(1)
Appendix F Number systems
389(9)
F.1 Introduction
389(1)
F.2 A generalized number system
389(1)
F.3 Binary numbers
390(2)
F.3.1 Conversion between decimal and binary numbers
391(1)
F.4 Hexadecimal numbers
392(1)
F.4.1 Conversion between binary and hexadecimal
393(1)
F.5 Octal
393(1)
F.6 Binary coded decimal
394(1)
F.7 FBinary coded octal systems
394(1)
F.8 Internal representation of information
395(1)
F.8.1Numeric data
395(1)
F.8.2 Alphanumeric data representation
396(1)
F.9 Binary arithmetic
396(2)
Appendix G GPIB (IEEE-488) mnemonics & their definitions
398(5)
Index 403

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