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9781598291926

Pragmatic Logic

by Eccles, William J.
  • ISBN13:

    9781598291926

  • ISBN10:

    1598291920

  • Format: Paperback
  • Copyright: 2007-04-07
  • Publisher: Morgan & Claypool

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Summary

Pragmatic Logic presents the analysis and design of digital logic systems. The author begins with a brief study of binary and hexadecimal number systems and then looks at the basics of Boolean algebra. The study of logic circuits is divided into two parts, combinational logic, which has no memory, and sequential logic, which does. Numerous examples highlight the principles being presented. The text ends with an introduction to digital logic design using Verilog, a hardware description language.

Author Biography

Bill Eccles has been Professor of Electrical and Computer Engineering at Rose-Hulman Institute of Technology since 1990 (except for one year at Oklahoma State).

Table of Contents

Forewordp. xi
Designing Digital Systems: Where are We Going?p. 1
Design-Up and Downp. 3
What's a Digital System?p. 3
Combinational Examplep. 4
Specificationsp. 4
Truth Tablep. 5
Reduction and Simplificationp. 6
Implementationp. 7
Payment!p. 8
Sequential Examplep. 8
Specificationsp. 8
State Diagramp. 9
Transition/Excitation Tablep. 10
Implementationp. 11
Payment!p. 11
Documentationp. 11
Logic Symbolsp. 12
IEEE Standard Symbolsp. 14
Wires and Busesp. 15
Signal Names and Levelsp. 15
Logic Circuit Familiesp. 16
TTL Familyp. 17
CMOS Familyp. 17
Summaryp. 18
Numbers and Arithmetic: Counting 101p. 19
Decimalp. 19
Binaryp. 21
Hexadecimalp. 23
Binary Arithmeticp. 25
Binary Additionp. 26
Subtraction and 2's-Complementp. 26
Codesp. 28
Summaryp. 30
Boolean Algebra: The Formal Stuffp. 31
Boolean Beginningsp. 31
Postulatesp. 31
Theoremsp. 32
Using Boolep. 34
A Proofp. 34
Logic Simplificationp. 35
Applying DeMorganp. 36
Canonical Formsp. 37
Definitionsp. 37
Example of Minterms and Maxtermsp. 39
Complements and Conversionsp. 40
Truth Tablesp. 41
Summaryp. 42
Combinational Logic: No Time Like the Presentp. 43
Gates and Symbolsp. 43
Basic Gatesp. 43
Nand and Norp. 44
Levels of Logicp. 47
Logic Circuit Analysisp. 48
Analysis Example Ip. 48
Analysis Example IIp. 49
Analysis Example IIIp. 50
Minimizationp. 51
Map Minimization-Two Variablesp. 52
Map Minimization-Three Variablesp. 55
Map Minimization-Four Variablesp. 57
Map Minimization-Don't-Caresp. 61
Other Minimization Methodsp. 62
Other Gate Arrangementsp. 62
And-Or and Nand-Nand Circuitsp. 62
Or-And and Nor-Nor Circuitsp. 64
Design Examplesp. 66
Multiplicationp. 66
Flip-Flop Driversp. 68
Summaryp. 71
Building Blocks: Bigger Stuffp. 73
Decoderp. 73
Minterm Generatorp. 74
Two Applications of Decodersp. 77
Other Decodersp. 80
Multiplexerp. 81
One-Chip Designsp. 83
Two Applications of Multiplexersp. 85
Arithmeticp. 89
Programmable Blocksp. 92
Read-Only Memoryp. 92
Programmable Logic Devicep. 93
Hazards and Glitchesp. 95
Example of Glitchp. 95
Hazardsp. 97
Design Examplep. 100
Summaryp. 104
Sequential Circuits: Now You Have Time!p. 105
Sequential Logic Analysisp. 105
Flip-Flopsp. 106
Tabular Analysis of Examplep. 109
Analysis Stepsp. 113
Latches and Flip-Flopsp. 113
Inverter Latchp. 114
Better Latchp. 115
Debouncing a Switchp. 116
Altogetherp. 117
Design Elementsp. 118
Design Examplesp. 119
Example Ip. 119
Example IIp. 123
Example IIIp. 126
Summaryp. 131
Counters and Registers: More Building Blocksp. 133
Countersp. 133
Count 30p. 138
"Gray" countingp. 138
Shift Registersp. 140
Universal Shift Registerp. 141
Ring Countersp. 142
Random Numbersp. 145
Another Counterp. 146
Mealy 'n Moorep. 148
Parallel-Serial Converterp. 151
Summaryp. 154
Design a Microwave: Well, the Controllerp. 157
Specificationsp. 158
Basic Functionsp. 158
User Interfacep. 159
Some Additionsp. 160
System Designp. 160
Finite State Machinep. 160
Signalsp. 162
Transitionsp. 163
Excitationsp. 165
FSM Circuitp. 167
Counters and Timersp. 167
Up Countersp. 169
Down Countersp. 171
Do They Work?p. 174
Displayp. 175
Keyboard Controlp. 177
Complete Systemp. 179
Summaryp. 183
Large Systems: Do "Real" Designers Do Boolean?p. 185
Basic Verilogp. 186
Structural Formp. 186
Dataflow Formp. 188
Behavioral Formp. 189
Flexible Verilogp. 192
Coin Adderp. 192
Multiplicationp. 193
Priority Encoderp. 195
Assignmentp. 196
Sequential Logic in Verilogp. 197
Simple Counterp. 198
Better Counterp. 199
Another Counterp. 200
Moore and Mealyp. 201
Final Examplep. 203
The Endp. 205
Author Biographyp. 207
Table of Contents provided by Ingram. All Rights Reserved.

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