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Retargetable Compiler Technology for Embedded Systems book cover, ISBN 9780792375784

Retargetable Compiler Technology for Embedded Systems

by Leupers, Rainer; Marwedel, Peter

ISBN13: 9780792375784
ISBN10: 0792375785
eBook ISBN(s): 9781475764208
Format: Hardcover
Copyright: 2001-11-01
Publisher: Kluwer Academic Pub

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Summary

It is well known that embedded systems have to be implemented efficiently. This requires that processors optimized for certain application domains are used in embedded systems. Such an optimization requires a careful exploration of the design space, including a detailed study of cost/performance tradeoffs. In order to avoid time-consuming assembly language programming during design space exploration, compilers are needed. In order to analyze the effect of various software or hardware configurations on the performance, retargetable compilers are needed that can generate code for numerous different potential hardware configurations. This book provides a comprehensive and up-to-date overview of the fast developing area of retargetable compilers for embedded systems. It describes a large set important tools as well as applications of retargetable compilers at different levels in the design flow. Retargetable Compiler Technology for Embedded Systems is mostly self-contained and requires only fundamental knowledge in software and compiler design. It is intended to be a key reference for researchers and designers working on software, compilers, and processor optimization for embedded systems.

Table of Contents

Preface

ix

Introduction

1

(8)

Embedded systems and their characteristics

1

(2)

Efficient hardware

3

(1)

Efficient software

4

(5)

How to specify embeded system software?

4

(1)

Efficient compilers

5

(1)

Retargetable compilers

6

(3)

Compilers in Embedded System Design

9

(18)

Design flow and hardware/software codesign

9

(2)

Design space exploration

11

(15)

Levels in the design space

11

(3)

Algorithm selection

14

(1)

Options for implementing algorithms

15

(1)

Process mapping and HW/SW partitioning

15

(2)

Memory system design

17

(1)

Instruction set options

18

(1)

Design of VLIW machines

18

(3)

Design of non-VLIW machines

21

(1)

Word length optimization

21

(2)

Register file sizing

23

(1)

Micro-architectural options

24

(2)

Design verification

26

(1)

Some Compiler Technology Background

27

(32)

Frontend

28

(6)

Intermediate representation

34

(6)

Backend

40

(19)

Code selection

40

(4)

Scheduling

44

(6)

Register allocation

50

(3)

Address code optimization

53

(3)

Phase coupling issues

56

(2)

Peephole optimization

58

(1)

Historical Overview

59

(8)

Contributions from the compiler community

59

(2)

UNCOL

59

(1)

Code generation for expressions

60

(1)

Contributions from microprogramming

61

(6)

Motivation

62

(1)

Early work

62

(1)

First retargetable microcode compilers

63

(1)

The MIMOLA Project

64

(3)

Retargetable Compiler Case Studies

67

(82)

Retargetable compilers for GPPs

68

(16)

GCC

68

(3)

LCC

71

(4)

Marion

75

(1)

PAGODE

76

(1)

SUIF/Machine SUIF

77

(2)

Zephyr/VPO

79

(2)

LANCE

81

(3)

Retargetable compilers for DSPs

84

(14)

CBC

84

(3)

REDACO

87

(2)

Code Syn/Flex Ware

89

(2)

SPAM

91

(4)

RECORD

95

(3)

Retargetable compilers for VLIWs

98

(7)

ROCKET

98

(1)

IMPACT

99

(1)

Trimaran

100

(2)

Trimedia

102

(1)

AVIV

103

(2)

Mescal

105

(1)

Retargetable compilers for ASIPs

105

(13)

MSSQ

105

(5)

PEAS

110

(3)

Valen-C

113

(1)

Express

114

(2)

BUILDABONG

116

(2)

Special retargetability techniques

118

(23)

Code generation methods

118

(1)

Balakrishnan's microcode compiler

118

(1)

Mavaddat's formal language approach

119

(1)

Langevin's automata theoretic approach

119

(1)

Romer's automata theoretic approach

120

(1)

Wilson's ILP based code generator

121

(1)

FACTS

122

(1)

Bashford's CLP based code generator

123

(2)

Yamaguchi's code generator

125

(1)

Retargetable compilers for microcontrollers

125

(1)

Krohm's compiler

125

(1)

SDCC

126

(1)

Code generator generators

126

(1)

IBURG

126

(3)

OLIVE

129

(2)

BEG

131

(1)

Assembly-level optimization

132

(1)

SALTO

132

(1)

PROPAN

132

(2)

LISA

134

(3)

Compilers for industrial reconfigurable cores

137

(1)

Retargetable test program generation

138

(1)

Retargetable estimation

139

(1)

Miscellaneous

140

(1)

Commercial retargetable compilers

141

(8)

CoSy

141

(1)

CHESS

142

(3)

Archelon

145

(2)

UCC

147

(2)

Summary and Outlook

149

(3)

Appendices

152

(3)

Tabular overview of compiler tools

153

(2)

References

155

(16)

About the authors

171

(2)

Index

173

Supplemental Materials

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