What is included with this book?
List of Figures | p. xiii |
List of Tables | p. xxiv |
Preface | p. xxv |
Acknowledgments | p. xxvii |
Prologue | p. xxix |
Bandpass Sigma-Delta A/D Converters--Fundamentals and State-of-the-Art | |
Introduction | p. 1 |
Analog-to-digital interfaces for digital radio receivers | p. 2 |
Analog-to-Digital Conversion: Fundamentals | p. 5 |
Sampling | p. 6 |
Quantization | p. 8 |
Oversampling [Sigma Delta] Analog-to-Digital Converters | p. 10 |
Basic architecture of a [Sigma Delta] modulator | p. 11 |
Figures of merit | p. 13 |
Signal-to-noise ratio | p. 13 |
Dynamic range and effective resolution | p. 13 |
First-order lowpass [Sigma Delta] modulator | p. 14 |
Lowpass [Sigma Delta] modulator architectures | p. 16 |
Second-order lowpass [Sigma Delta] Modulator | p. 17 |
High-order lowpass [Sigma Delta] modulators | p. 18 |
Multi-bit lowpass [Sigma Delta] modulators | p. 22 |
Bandpass [Sigma Delta] modulators | p. 23 |
Quantization noise shaping of bandpass [Sigma Delta] modulators | p. 25 |
Signal passband location | p. 28 |
Synthesis of bandpass [Sigma Delta] modulator architectures | p. 30 |
The Lowpass-to-bandpass transformation method | p. 30 |
Pattern noise of second-order bandpass [Sigma Delta] modulators | p. 33 |
Other lowpass-to-bandpass transformations | p. 35 |
Optimized synthesis of N[subscript TF] | p. 36 |
Quadrature bandpass [Sigma Delta] modulators | p. 37 |
N-path bandpass [Sigma Delta] modulators | p. 41 |
Continuous-time bandpass [Sigma Delta] modulators | p. 43 |
Decimation for bandpass [Sigma Delta] ADCs | p. 46 |
State-of-the-art bandpass [Sigma Delta] ADCs | p. 48 |
Switched-Current Building Blocks for [Sigma Delta] Modulators | |
Introduction | p. 55 |
Principle of Operation: The Current Memory Cell | p. 57 |
SI Integrators | p. 61 |
Review of discrete-time integrators | p. 61 |
SI delay elements | p. 62 |
SI non-inverting integrators | p. 64 |
SI inverting integrators | p. 69 |
Generalized SI integrators | p. 73 |
SI Differentiators | p. 74 |
Discrete-time differentiators | p. 74 |
Inverting SI differentiators | p. 75 |
Non-inverting SI differentiators | p. 77 |
Bilinear SI differentiators | p. 78 |
SI Resonators | p. 80 |
Biquad filter background | p. 80 |
Discrete-time resonators | p. 83 |
Resonator structures based on differentiators and integrators | p. 84 |
Delay element based resonators | p. 88 |
SI Resonators | p. 89 |
SI LDI loop resonators | p. 90 |
SI FE loop resonators | p. 94 |
SI delay loop resonators | p. 98 |
SI quantizers | p. 100 |
Current Mode 1-bit D/A Converters | p. 103 |
Mechanisms of Error in Switched-Current Circuits | |
Introduction | p. 107 |
Finite output-input conductance ratio error | p. 108 |
Linear analysis | p. 109 |
Non-linear analysis | p. 112 |
Effect of the finite steering switch-on resistance | p. 116 |
Circuit strategies to reduce the finite output-input conductance ratio error | p. 121 |
Charge injection error | p. 127 |
Analysis and modelling of the charge injection error | p. 128 |
Impact of the charge injection error on the performance of the memory cell | p. 132 |
Circuit strategies to reduce the charge injection error | p. 135 |
Dummy switch compensation technique | p. 136 |
Circuit replication technique | p. 137 |
Zero-voltage technique | p. 140 |
Algorithmic technique--the S[superscript n]I memory cell | p. 140 |
Fully-differential circuits | p. 143 |
Settling error | p. 146 |
Linear analysis of a simple memory cell | p. 147 |
Linear analysis of enhanced cells | p. 150 |
Non-linear settling error | p. 153 |
Stationary input signals | p. 154 |
Non-stationary input signals | p. 158 |
Phase delay and uncertainty of the sampled current caused by non-stationary input signals | p. 163 |
Harmonic distortion due to non-stationary input signals | p. 165 |
Mismatch error | p. 169 |
Effect of mismatch error on the gain stage of second-generation memory cells | p. 170 |
Effect of mismatch error on fully-differential second-generation memory cells | p. 174 |
Electrical noise | p. 177 |
Noise analysis of a memory cell | p. 179 |
Noise of the cell on the sampling phase | p. 181 |
Noise of the cell on the hold phase | p. 183 |
Equivalent noise bandwidth | p. 184 |
Maximum signal range--Class AB memory cells | p. 187 |
Other mechanisms of error | p. 189 |
Junction leakage current error | p. 190 |
Current glitches | p. 191 |
Effect of clock signal: clock jitter and uncertainty on the sampling instant | p. 192 |
Clock jitter | p. 192 |
Uncertainty on the sampling instant | p. 193 |
Design considerations for SI memory cells | p. 195 |
Non-Ideal Performance of Switched-Current Bandpass [Sigma Delta] Modulators | |
Introduction | p. 203 |
Ideal noise shaping in fourth-order bandpass [Sigma Delta] modulators | p. 204 |
Impact of linear errors on the performance of SI integrators | p. 208 |
Effect of [epsilon subscript g] on the transfer function of LD integrators | p. 209 |
Effect of [epsilon subscript q] on the transfer function of LD integrators | p. 211 |
Effect of [epsilon subscript s] on the transfer function of LD integrators | p. 211 |
Impact of linear errors on the performance of SI resonators | p. 212 |
Effect of memory cell errors | p. 212 |
Effect of resonator loop gain errors | p. 214 |
Non-ideal quantization noise shaping in fourth-order BP[Sigma Delta]Ms | p. 219 |
Cumulative influence of SI errors on the quantization noise shaping | p. 225 |
Effect of cumulative errors on the performance of the memory cell | p. 227 |
LD Integrator considering cumulative errors | p. 230 |
Noise shaping degradation with cumulative errors | p. 231 |
Harmonic distortion due to non-linear SI errors | p. 235 |
Harmonic distortion due to static non-linear errors | p. 236 |
Simple model for the memory cell in the presence of static non-linear errors | p. 236 |
Harmonic distortion in fully-differential SI integrators | p. 238 |
Harmonic distortion in fully-differential SI resonators | p. 242 |
Harmonic distortion in SI fourth-order bandpass [Sigma Delta] modulators | p. 247 |
Harmonic distortion due to the settling error | p. 249 |
Harmonic distortion in fully-differential SI integrators due to settling error | p. 251 |
Harmonic distortion in SI resonators due to the settling error | p. 254 |
Harmonic distortion in SI fourth-order BP[Sigma Delta]Ms due to the settling error | p. 258 |
Harmonic distortion caused by the sampling-and-hold process | p. 260 |
Harmonic distortion due to resonator loop gain errors | p. 263 |
Harmonic distortion in fully-differential integrators due to non-linear scaling errors | p. 264 |
Harmonic distortion in 4th-order BP[Sigma Delta]Ms due to non-linear scaling errors | p. 265 |
SNR degradation due to non-linear SI errors | p. 268 |
Thermal noise in bandpass [Sigma Delta] modulators | p. 271 |
Noise analysis of SI integrators | p. 272 |
Input-equivalent thermal noise of a fourth-order BP[Sigma Delta]M | p. 273 |
In-band thermal noise power for simple memory-cell based BP[Sigma Delta]Ms | p. 275 |
Behavioral Simulation of Switched-Current [Sigma Delta] Modulators | |
Introduction | p. 279 |
Simulation of SI circuits | p. 282 |
An overview of existing SI simulation tools | p. 282 |
Behavioural simulation of SI circuits | p. 285 |
Behavioural modeling of SI integrators | p. 287 |
Modeling of SI integrators | p. 288 |
Calculation of the stationary drain current | p. 290 |
Transient response | p. 293 |
Calculation of the charge injection error | p. 298 |
Thermal noise | p. 301 |
Calculation of the memorized drain current for both memory cells | p. 302 |
Calculation of the output current | p. 304 |
Behavioural modeling of the first memory cell in the modulator chain | p. 306 |
Behavioural modeling of SI resonators | p. 307 |
Behavioural Modeling of 1-bit Quantizers and D/A Converters | p. 308 |
Current Comparators | p. 309 |
1-bit D/A converters | p. 311 |
SDSI: A MATLAB based behavioural simulator for SI [Sigma Delta] modulators | p. 312 |
Description of the tool | p. 312 |
Implementing SI behavioural models in SIMULINK | p. 314 |
Graphical User Interface of SDSI | p. 320 |
SDSI Application: Effect of SI errors on single-loop LP and BP [Sigma Delta] modulators | p. 324 |
Modulator topologies and models | p. 325 |
Performance degradation due to SI errors | p. 326 |
Practical IC Implementations | |
Introduction | p. 337 |
Bandpass [Sigma Delta] modulators for AM digital radio receivers | p. 339 |
Switched-current implementation | p. 343 |
Memory cell | p. 343 |
Design considerations | p. 343 |
Memory cell performance | p. 346 |
SI Integrator | p. 353 |
SI Resonator | p. 358 |
1-bit Quantizer | p. 361 |
1-bit D/A Converter | p. 364 |
Complete schematic of the modulators | p. 365 |
A high frequency current mode buffer | p. 365 |
Illustrating the Speed Degradation in SI Interfaces | p. 366 |
Circuit Description | p. 368 |
Practical design issues | p. 369 |
Clock phase generator circuit | p. 370 |
Layout considerations | p. 372 |
Experimental results | p. 376 |
Measurement set-up | p. 377 |
Mixed-signal printed circuit board | p. 378 |
Instrumentation and test set-up | p. 381 |
Measured results | p. 383 |
Current mode buffer | p. 383 |
SI resonator | p. 384 |
SI fourth-order bandpass [Sigma Delta] modulator | p. 392 |
SI second-order bandpass [Sigma Delta] modulator | p. 395 |
Comparison to the predictive results of the SI bandpass [Sigma Delta] modulators | p. 399 |
Illustrating by measurements the performance degradation with SI errors | p. 403 |
References | p. 413 |
Distortion analysis of SI memory cells with nonstationary input signals using Volterra series | p. 431 |
Effect of mismatch error on the performance of a memory cell with non-unity gain | p. 439 |
Index | p. 445 |
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