Transistor Level Modeling for Analog/ RF IC Design

by Grabinski, Wladyslaw; Nauwelaers, Bart; Schreurs, Dominique

• ISBN13: 9781402045554
• ISBN10: 1402045557
• Format: Hardcover
• Copyright: 2006-05-16
• Publisher: Springer Verlag

Summary

The editors and authors present a wealth of knowledge regarding the most relevant aspects in the field of MOS transistor modeling. The first chapter lays out the 2/3D process and device simulations as an effective tool for a better understanding of the internal behavior of semiconductor structures and this with a focus on high-voltage MOSFET devices. Subsequently, the mainstream developments of both the PSP and the EKV models are discussed in detail. These physics-based MOSFET models are compared to the measurement-based models which are frequently used in RF applications. The comparison includes an overview of the relevant empirical models and measurement techniques. The following chapters include SOI-specific aspects, modeling enhancement of small geometry MOSFET devices and a survey of quantum effects in devices and circuits. Finally, an explanation of hardware description languages such as VHDL-AMS and Verilog-A is offered and shows the possibilities of the practical implementation and standardization of the different modeling methodologies found in the preceding chapters. The variety of subjects and the high quality of content of this volume make it a reference document for researchers and users of MOSFET devices and models. The book can be recommended to everyone who is involved in compact model developments, numerical TCAD modeling, parameter extraction, space-level simulation or model standardization. The book will appeal equally to PhD students who want to understand the ins and outs of MOSFETs as well as to modeling designers working in the analog and high-frequency areas.

Author Biography

Dr. Grabinski, Dr. Nauwelaers and Dr. Scheurs organized the MOS-Modeling workshop at the European Solid-State Devices Conference (ESSDERC) in 2004, and due to popular request will do again at ESSDERC 2005 in Grenoble. Dr. Grabinski is in industry, at Freescale Semiconductor, while Dr. Nauwelaers and Dr. Schreurs are in academia.

Table of Contents

Foreword	vii
Hiroshi Iwai
Introduction	ix
Wladek Grabinski, Bart Nauwelaers and Dominique Schreurs
1 2/3-D process and device simulation. An effective tool for better understanding of internal behavior of semiconductor structures	1	(28)
Daniel Donoval, Andrej Vrbicky, Ales Chvala, and Peter Beno
2 PSP: An advanced surface-potential-based MOSFET model	29	(38)
R. van Langevelde, and G. Gildenblat
3 EKV3.0: An advanced charge based MOS transistor model. A design-oriented MOS transistor compact model for next generation CMOS	67	(30)
Matthias Bucher, Antonios Bazigos, Francois Krummenacher, Jean-Micehl Sallese, and Christian Enz
4 Modelling using high-frequency measurements	97	(24)
Dominique Schreurs
5 Empirical FET models	121	(36)
Iltcho Angelov
6 Modeling the SOI MOSFET nonlinearities. An empirical approach	157	(24)
B. Parvais, A. Siligaris
7 Circuit level RF modeling and design	181	(28)
Nobuyuki Itoh
8 On incorporating parasitic quantum effects in classical circuit simulations	209	(34)
Frank Felgenhauer, Maik Begoin and Wolfgang Mathis
9 Compact modeling of the MOSFET in VHDL-AMS	243	(28)
Christophe Lalletnertt, François Pecheux, Alain Vachoux and Fabien Prégaldiny
10 Compact modeling in Verilog-A	271	(22)
Boris Troyanovsky; Patrick 0'Halloran and Marek Mierzwinski
Index	293