Using Waves and Vhdl for Effective Design and Testing

by Hanna, James P.; Hillman, Robert G.; Hirsch, Herb L.; Noh, Tim H.; Vemuri, Ranga R.

• ISBN13: 9780792397991
• ISBN10: 0792397991
• Format: Hardcover
• Copyright: 1996-11-01
• Publisher: Kluwer Academic Pub

Summary

Presents a standard VHDL model test and verification methodology that facilitates automatic test bench generation as well as model and testbench interchange. Describes how a digital waveform may be dissected into components. CD ROM included.

Table of Contents

Preface	xvii	(4)
Acknowledgments	xxi
Chapter 1 Introduction	1	(8)
1.1 Electronic Design Automation (EDA) and Testing	1	(2)
1.2 The VHSIC Hardware Description Language (VHDL)	3	(2)
1.3 WAVES with VHDL	5	(1)
1.4 Overview of the Text	6	(3)
Chapter 2 The History and Background of WAVES	9	(10)
2.1 WAVES History	9	(2)
2.2 WAVES-VHDL Integration for Modeling and Simulation	11	(4)
2.3 WAVES Common Packages (the WAVES 1164 Library)	15	(4)
2.3.1 WAVES 1164 Multi-Valued Logic (MVL) System	15	(1)
2.3.2 Waveform Shapes	16	(1)
2.3.3 Pin Codes	16	(1)
2.3.4 Testbench Utilities	16	(3)
Chapter 3 WAVEFORM Concepts	19	(20)
3.1 Waveforms	20	(1)
3.2 Characteristics and Structures of the Waveform	21	(13)
3.2.1 The Waveform	21	(1)
3.2.2 Slices	22	(1)
3.2.3 Signals and Events	23	(2)
3.2.4 Frames	25	(4)
3.2.5 Pin Codes, Frame Sets, and Frame Set Arrays	29	(5)
3.3 Composing the Time-based Waveform	34	(5)
3.3.1 The External File-A Simple Array of Duration Data	34	(1)
3.3.2 The Waveform Composition Process	35	(4)
Chapter 4 WAVES Concepts	39	(34)
4.1 The Logic Value System	40	(5)
4.2 Pin Codes	45	(3)
4.3 Frames and Frame Sets	48	(25)
4.3.1 Terminology and Waveform Concepts Review	49	(4)
4.3.2 Data-Dependent Formats	53	(1)
4.3.3 Drive Formats	54	(14)
4.3.3.1 Compound Formats	55	(7)
4.3.3.2 Pulse Formats	62	(6)
4.3.4 Compare Formats	68	(5)
Chapter 5 The WAVES Dataset	73	(28)
5.1 Overview of the Design and Testing Environment	73	(1)
5.2 The WAVES Dataset Structure	74	(2)
5.3 WAVES Files	76	(10)
5.3.1 Test Pins	77	(3)
5.3.2 The Waveform Generator Procedure (WGP)	80	(6)
5.4 The External Files	86	(3)
5.5 The Header File	89	(6)
5.5.1 Dataset Identification	90	(1)
5.5.2 WAVES File Identification	91	(2)
5.5.3 External File Identification	93	(1)
5.5.4 Waveform Identification	93	(2)
5.6 The WAVES Dataset Development Procedure	95	(6)
5.6.1 The WAVES_STD Library	96	(1)
5.6.2 The WAVES_1164 Library	97	(1)
5.6.3 The UUT Test Pins Package	98	(1)
5.6.4 The WAVES Object Package	98	(1)
5.6.5 The Waveform Generator Package	99	(1)
5.6.6 The WAVES External File	99	(1)
The WAVES Header File	99	(2)
Chapter 6 Complete WAVES/VHDL Integration	101	(38)
6.1 The Integrated WAVES_VHDL Simulation System	101	(1)
6.2 The WAVES_1164_Utilities Package	102	(7)
6.2.1 WAVES Translation Functions	105	(3)
6.2.2 The WAVES Compatible Function	108	(1)
6.3 Implementation of the WAVES-VHDL Simulation System	109	(15)
6.3.1 Developing VDHL Models of the UUT	109	(2)
6.3.2 WAVES Dataset Generation	111	(4)
6.3.2.1 Create the WAVES Header File	111	(1)
6.3.2.2 Define and Complete UUT Test Pins Package	112	(1)
6.3.2.3 Complete the WAVES Objects Package	112	(1)
6.3.2.4 Define and Compile the Waveform Generator Procedure Package	113	(2)
6.3.2.5 Create the WAVES External File	115	(1)
6.3.3 Testbench Generation	115	(9)
6.3.3.1 Context Clauses	118	(1)
6.3.3.2 Component and Configuration Declarations	119	(1)
6.3.3.3 Connection Signals	119	(1)
6.3.3.4 Invocation of the Waveform Generator	120	(1)
6.3.3.5 Translation Functions	121	(1)
6.3.3.6 UUT Instantiation	121	(1)
6.3.3.7 Monitor Processes	122	(2)
6.4 Example: The 54/74180 8-Bit Parity Generator/Checker	124	(15)
6.4.1 Device Specifications	124	(1)
6.4.2 VDHL Models for the UUT, WAVES Dataset, and Testbench	125	(11)
6.4.2.1 A VDHL Model for the 54/74180 (UUT)	126	(2)
6.4.2.2 The WAVES Dataset	128	(5)
6.4.2.2.1 The Header File	129	(1)
6.4.2.2.2 The Test Pins Package	130	(1)
6.4.2.2.3 The WAVES_Objects Package	130	(1)
6.4.2.2.4 The Waveform Generator Procedure	131	(1)
6.4.2.2.5 The External Test Vector File	132	(1)
6.4.2.3 The Testbench	133	(3)
6.4.3 Simulation Results	136	(3)
Chapter 7 The External File	139	(12)
7.1 Required File Declaratiions	140	(1)
7.2 The External File Format	141	(10)
7.2.1 The Formal Description of the External File Format	141	(2)
7.2.2 External File Format Examples	143	(8)
Chapter 8 Some Practical Issues and Examples in WAVES	151	(42)
8.1 Relative Edge Placement in WAVES	151	(19)
8.1.1 Device Specifications of Embedded Microprocessor	153	(4)
8.1.2 VHDL Model Generation for the Embedded Processor	157	(2)
8.1.3 WAVES Dataset Generation	159	(7)
8.1.3.1 Header File for the Embedded Microprocessor Example	159	(1)
8.1.3.2 Test Pins Package for the Embedded Microprocessor Example	160	(1)
8.1.3.3 WAVES_Objects Package for the Embedded Micro-processor Example	161	(1)
8.1.3.4 Waveform Generator Procedure (WGP) for the Embedded Microprocessor Example	162	(3)
8.1.3.5 External Test Vector File for the Embedded Micro-processor Example	165	(1)
8.1.4 Testbench Generation	166	(4)
8.2 Bi-Directional Pin Issues in WAVES	170	(23)
8.2.1 Device Specifications for the 54LS/74LS299 Device	171	(2)
8.2.2 VHDL Model (UUT) for the 54LS/74LS299 Device	173	(5)
8.2.3 WAVES Dataset Generation for the 54LS/74LS299 Device	178	(8)
8.2.3.1 Header File the 54LS/74LS299 Device	178	(2)
8.2.3.2 Test Pins Package for the 54LS/74LS299 Device	180	(1)
8.2.3.3 WAVES_Objects Package for the 54LS/74LS299 Device	180	(1)
8.2.3.4 Waveform Generator Procedure for the 54LS/74LS299 Device	181	(3)
8.2.3.5 External Test Vector File for the 54LS/74LS299 Device	184	(2)
8.2.4 Testbench Generation for the 54LS/74LS299 Device	186	(7)
Chapter 9 Capturing Waveforms and Supporting Automatic Test Equipment (ATE)	193	(26)
9.1 Description of the Case Study	193	(2)
9.2 A WAVES Dataset for the AM2901	195	(13)
9.2.1 The Test Pins Package for the AM2901	195	(2)
9.2.2 The Waves_Objects Package for the AM2901	197	(1)
9.2.3 A Waveform Generator Procedure (WGP) for the AM2901	198	(6)
9.2.4 An External Test Vector File for the AM2901	204	(3)
9.2.5 The Header File for the AM2901	207	(1)
9.3 A Testbench for the AM2901	208	(11)
Chapter 10 WAVES Level 2	219	(28)
10.1 External Files in Level 2	219	(2)
10.2 Waveform Generation Procedures in Level 2	221	(1)
10.3 WAVES Level 2 Constructs	221	(8)
10.3.1 VHDL Constructs Removed in WAVES Level 2	222	(2)
10.3.2 WAVES Level 2 Added Constructs, not present in WAVES Level 1	224	(1)
10.3.3 WAVES Level 2 Construct Examples	225	(4)
10.3.3.1 Data Types in WAVES Level 2	225	(3)
10.3.3.2 Subprograms in WAVES Level 2	228	(1)
10.3.3.3 File I/O in WAVES Level 2	229	(1)
10.4 WAVES Level 2 Usage	229	(16)
10.5 Summary	245	(2)
Chapter 11 Interactive Waveforms: Handshaking and Matching	247	(16)
11.1 Handshake Delays	248	(7)
11.1.1 APPLY Procedures	248	(2)
11.1.2 Waveform Generation Procedure	250	(5)
11.1.3 Example	250	(5)
11.2 Matching	255	(8)
11.2.1 Match Procedures	256	(1)
11.2.2 Match Functions	257	(1)
11.2.3 APPLY Procedures	257	(1)
11.2.4 Waveform Generation Procedure	258	(1)
11.2.5 Example	258	(5)
Chapter 12 Using WAVES for Boundary-Scan Architectures	263	(10)
12.1 Boundary-Scan Architecture	263	(1)
12.2 External File Conventions	263	(2)
12.3 Waveform Generation Procedure	265	(1)
12.4 Boundary-Scan Example	266	(3)
12.5 References	269	(4)
Appendix A WAVES Logic Value System for IEEE STD 1164-1993	273	(4)
Appendix B WAVES_1164_Pin_Codes	277	(2)
Appendix C WAVES_1164_Frames Package	279	(8)
Appendix D WAVES_1164_Utilities Package	287	(10)
Application Index	297	(4)
Topic Index	301