Verilog and System Verilog Gotchas

by Sutherland, Stuart; Mills, Don

• ISBN13: 9780387717142
• ISBN10: 0387717145
• Format: Hardcover
• Copyright: 2007-06-18
• Publisher: Springer Verlag

Summary

In programming,"Gotcha" is a well known term. A gotcha is a language feature, which, if misused, causes unexpected - and, in hardware design, potentially disastrous - behavior. The purpose of this book is to enable engineers to write better Verilog/SystemVerilog design and verification code, and to deliver digital designs to market more quickly. This book shows over 100 common coding mistakes that can be made with the Verilog and SystemVerilog languages. Each example explains in detail the symptoms of the error, the languages rules that cover the error, and the correct coding style to avoid the error. The book helps digital design and verification engineers to recognize these common coding mistakes, and know how to avoid them. Many of these errors are very subtle, and can potentially cost hours or days of lost engineering time trying to find and debug the errors. This book is unique because while there are many books that teach the language, and a few that try to teach coding style, no other book addresses how to recognize and avoid coding errors with these languages.

Table of Contents

Introduction : what is a gotcha?	p. 3
Declaration and literal number gotchas	p. 7
RTL modeling gotchas	p. 49
Operator gotchas	p. 99
General programming gotchas	p. 123
Object oriented and multi-threaded programming gotchas	p. 153
Randomization, coverage and assertion gotchas	p. 173
Tool compatibility gotchas	p. 195
Table of Contents provided by Blackwell. All Rights Reserved.