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9780792372615

Virtual Components Design and Reuse

by ;
  • ISBN13:

    9780792372615

  • ISBN10:

    0792372611

  • Format: Hardcover
  • Copyright: 2000-12-01
  • Publisher: Kluwer Academic Pub
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Summary

Design reuse is not just a topic of research but a real industrial necessity in the microelectronic domain and thus driving the competitiveness of relevant areas like for example telecommunication or automotive. Most companies have already dedicated a department or a central unit that transfer design reuse into reality. All main EDA conferences include a track to the topic, and even specific conferences have been established in this area, both in the USA and in Europe. Virtual Components Design and Reuse presents a selection of articles giving a mature and consolidated perspective to design reuse from different points of view. The authors stem from all relevant areas: research and academia, IP providers, EDA vendors and industry. Some classical topics in design reuse, like specification and generation of components, IP retrieval and cataloguing or interface customisation, are revisited and discussed in depth. Moreover, new hot topics are presented, among them IP quality, platform-based reuse, software IP, IP security, business models for design reuse, and major initiatives like the MEDEA EDA Roadmap.

Table of Contents

List of Figures
ix
List of Tables
xiii
Virtual Components - From Research to Business
1(12)
Jurgen Haase
Application of Virtual Components
2(5)
The Virtual Components Business
7(3)
Research in the Reuse Field
10(1)
Conclusions
11(2)
Evaluation of Technology and the Medea Design Automation Roadmap
13(20)
Joseph Borel
Anton Sauer
Ralf Seepold
Introduction
13(1)
Targets of EDA Activities
14(2)
The Semiconductor Industry Challenge
16(3)
Roadmap Coverage
19(3)
IP Reuse Roadmap
22(10)
Conclusion
32(1)
Productivity in VC Reuse: Linking SOC Platforms to Abstract Systems Design Methodology
33(14)
Grant Martin
Overview
33(1)
The Nature of System Design
34(1)
SOC Integration Platforms
34(2)
Function-Architecture Co-Design
36(3)
Linking the two Concepts: Platform-Based System Co-Design
39(4)
Multimedia Examples
43(2)
Other Applications of Platform-Based System Design
45(1)
Conclusion and Future
46(1)
Software IP in Embedded Systems
47(18)
Carsten Boke
Carsten Ditze
H.J. Eickerling
Uwe Glasser
Bernd Kleinjohann
Franz Rammig
Wolfgang Thronicke
Introduction
48(1)
CORBA: The Base Technology for Integration
49(2)
Types of Coupling for Software IP
51(2)
Bridging Semantics: The ASM Approach
53(2)
Reuse and Workflows - towards Intelligent Resource Management
55(1)
Document Exchange in Software IP Frameworks
56(2)
An Application Example: Building Real-Time Communication Systems from Software IP
58(7)
ARDID: A Tool and a Model for the Quality Analysis of VHDL Based Designs
65(16)
Yago Torroja
Felipe Machado
Fernando Casado
Eduardo de la Torre
Teresa Riesgo
Javier Uceda
Quality Attributes of VHDL Designs
65(2)
ARDID: A VHDL Quality Analysis Tool
67(6)
Inside ARDID: Simplified Hardware Model
73(4)
Experimental Results
77(2)
Conclusions
79(2)
A VHDL Analysis Environment for Design Reuse
81(14)
Claudio Costi
D. Michael Miller
Introduction
81(1)
Reuse of Soft Components
82(1)
Valet Project
83(2)
From VHDL Source Code to Design Knowledge
85(9)
Conclusions
94(1)
Lambda-Block Analysis of VHDL for Design Reuse
95(10)
William Fornaciari
Salvatore Minonne
Fabio Salice
Massimo Vincenzi
Introduction
95(2)
Overview of the global Environment
97(1)
Testbench Orthogonality
98(1)
Lambda-blocks Analysis
99(3)
The Reuse Experiment
102(1)
Concluding Remarks
103(2)
IP Retrieval by Solving Constraint Satisfaction Problems
105(14)
Manfred Koegst
Jorg Schneider
Ralph Bergmann
Ivo Vollrath
Introduction
105(1)
Archiving and Retrieval in the Reuse Process
106(2)
Modelling and Retrieval by case-based Reasoning
108(4)
Concept of an Adapted Database Management
112(3)
Summary
115(1)
Example
116(3)
Cryptographic Reuse Library
119(12)
Andreas Schubert
Ralf Jahrig
Walter Anheier
Introduction
119(1)
Library Concept
120(3)
CVC Structure
123(4)
CVC interfaces
127(2)
Conclusions
129(2)
A VHDL Reuse Component Model for Mixed Abstraction Level Simulation and Behavioral Synthesis
131(14)
Cordula Hansen
Oliver Bringmann
Wolfgang Rosenstiel
Introduction
131(1)
A VHDL Reuse Component Model for Simulation and Synthesis
132(2)
The Frame Component Concept
134(2)
Reuse Component Library and CADDY-II
136(2)
Frame Component and Synthesis
138(2)
Frame Component and Simulation
140(4)
Conclusion
144(1)
Virtual Component Interfaces
145(14)
M. M. Kamal Hashmi
Introduction
145(1)
Definitions and Terminology
146(1)
VC Creation and ReUse
146(1)
Cutting the Cost of ReUse
147(1)
Interface Based Design
148(6)
VCI Specification Standards Efforts
154(1)
VSI SLD Interface Documentation Standard
154(2)
VHDL Extensions for Interfaces and System Design
156(1)
Conclusion
157(1)
Acknowledgements
157(2)
A Method for Interface Customization of Soft IP Cores
159(12)
Robert Siegmund
Dietmar Muller
Introduction
159(2)
Method
161(5)
Interface Synthesis
166(3)
Results
169(1)
Conclusions and Future Work
170(1)
Modeling Assistant - A Flexible VCM Generator in VHDL
171(12)
Andrzej Pulka
Introduction
171(1)
Reusability of VHDL Models
171(1)
Data Model
172(4)
Generation Entity of Model (GEM)
176(1)
Experiments and Results
177(3)
Summary
180(3)
Reusing IPS to Implement a SPARC® SOC
183(12)
Serafin Olcoz
Alfredo Gutierrez
Denis Navarro
Introduction
183(1)
SPARC μProcessor IP
184(4)
μProcessor Peripherals for Embedded Systems
188(1)
A μController for a Scalable Remote Terminal Unit
189(2)
CoMES: Co-Design Methodology for Embedded Systems
191(1)
Conclusion and Future Work
192(3)
Hardwwwired: Using the Web as Repository of VHDL Components
195(12)
Adriano Sarmento
Jorge Fernandes
Edna Barros
Introduction
195(2)
Hardwwwired: The Architecture
197(1)
Mapping VHDL Descriptions Into JAVA Objects
198(1)
Security Policies
199(2)
Designing a CPU With Hardwwwired: A Case Study
201(3)
Conclusion and Future Work
204(3)
References 207(16)
Index 223(4)
Glossary 227

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